diff options
| author | Eric Anholt <[email protected]> | 2013-06-21 09:47:32 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2013-06-28 13:35:25 -0700 |
| commit | bb2e312d4d631099528cfa4f9777e92cf60dbee8 (patch) | |
| tree | bb9d966b1d82b77339f7e0640849f2ac730caa7c /src/mesa/drivers/dri | |
| parent | a61d8f6110025d8fb606ce7edd832e661042f09b (diff) | |
i965: Drop i915-specific vtbl entries.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vtbl.c | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_context.h | 23 |
2 files changed, 1 insertions, 28 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index 5bc4eb2d54b..fc4535429ff 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -195,12 +195,6 @@ static bool brw_is_hiz_depth_format(struct intel_context *intel, void brwInitVtbl( struct brw_context *brw ) { - brw->intel.vtbl.check_vertex_size = 0; - brw->intel.vtbl.emit_state = 0; - brw->intel.vtbl.reduced_primitive_state = 0; - brw->intel.vtbl.render_start = 0; - brw->intel.vtbl.update_texture_state = 0; - brw->intel.vtbl.invalidate_state = brw_invalidate_state; brw->intel.vtbl.new_batch = brw_new_batch; brw->intel.vtbl.finish_batch = brw_finish_batch; diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h index 20c623d1568..acb1e10710a 100644 --- a/src/mesa/drivers/dri/i965/intel_context.h +++ b/src/mesa/drivers/dri/i965/intel_context.h @@ -134,30 +134,14 @@ struct intel_context struct { void (*destroy) (struct intel_context * intel); - void (*emit_state) (struct intel_context * intel); void (*finish_batch) (struct intel_context * intel); void (*new_batch) (struct intel_context * intel); - void (*emit_invarient_state) (struct intel_context * intel); - void (*update_texture_state) (struct intel_context * intel); - - void (*render_start) (struct intel_context * intel); - void (*render_prevalidate) (struct intel_context * intel); - void (*set_draw_region) (struct intel_context * intel, - struct intel_region * draw_regions[], - struct intel_region * depth_region, - GLuint num_regions); - void (*update_draw_buffer)(struct intel_context *intel); - void (*reduced_primitive_state) (struct intel_context * intel, - GLenum rprim); + void (*update_draw_buffer)(struct intel_context *intel); - bool (*check_vertex_size) (struct intel_context * intel, - GLuint expected); void (*invalidate_state) (struct intel_context *intel, GLuint new_state); - void (*assert_not_dirty) (struct intel_context *intel); - void (*debug_batch)(struct intel_context *intel); void (*annotate_aub)(struct intel_context *intel); bool (*render_target_supported)(struct intel_context *intel, @@ -167,10 +151,6 @@ struct intel_context bool (*is_hiz_depth_format)(struct intel_context *intel, gl_format format); - /** - * Surface state operations (i965+ only) - * \{ - */ void (*update_texture_surface)(struct gl_context *ctx, unsigned unit, uint32_t *binding_table, @@ -187,7 +167,6 @@ struct intel_context uint32_t size, uint32_t *out_offset, bool dword_pitch); - /** \} */ /** * Send the appropriate state packets to configure depth, stencil, and |