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authorKenneth Graunke <[email protected]>2014-09-30 01:15:56 -0700
committerKenneth Graunke <[email protected]>2014-10-09 15:03:32 +0200
commitb7844d12487dbac702ecd734faeffa6fe1a61a83 (patch)
treedc2834132baac6958373a07af0771d1e4b5b26b0 /src/mesa/drivers/dri
parentd489a8a73d273e9042b3de49085576c2acd5153a (diff)
i965: Use BDW_MOCS_PTE for renderbuffers.
Write-back caching cannot be used for buffers being scanned out by the display engine; surfaces used for scan-out must be write-through or uncached. I originally chose WT for render targets because it works in all cases. However, we really want to use write-back caching where possible, as it is more efficient. Most renderbuffers are not used for scanout - off-screen FBOs certainly are fine, and non-pageflipped backbuffers should be fine as well. So in most cases WB will work. However, we don't know what will be used for scan-out, so we instead simply use the PTE value specified by the kernel, as it knows these things. This matches our MOCS choice on Haswell. Fixes performance regressions since commit ee4484be3dc827cf15bcf109f5 in a microbenchmark (spotted by Eero Tamminen). Improves performance in GLBenchmark 2.7/EgyptHD by 7.44362% +/- 0.496939% (n=55) on a Broadwell GT2. Improves performance in a bunch of other microbenchmarks by ~15% or so. Signed-off-by: Kenneth Graunke <[email protected]> Reported-by: Eero Tamminen <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Cc: [email protected]
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/i965/gen8_surface_state.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 40eb2eab0ae..6dd343f57f4 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -377,7 +377,7 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
horizontal_alignment(mt) |
surface_tiling_mode(tiling);
- surf[1] = SET_FIELD(BDW_MOCS_WT, GEN8_SURFACE_MOCS) | mt->qpitch >> 2;
+ surf[1] = SET_FIELD(BDW_MOCS_PTE, GEN8_SURFACE_MOCS) | mt->qpitch >> 2;
surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT);