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authorStephane Marchesin <[email protected]>2006-03-10 01:43:39 +0000
committerStephane Marchesin <[email protected]>2006-03-10 01:43:39 +0000
commit9ebde216cc3e7a9dbe8090abe976db38f63d4717 (patch)
tree1041668c2ebec70c5712f481229c8abbafb8bddb /src/mesa/drivers/dri
parent2560e65a9aa0479ebb564a2ac5161a1c47507ce0 (diff)
A little work here and there
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_fifo.c9
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_reg.h14
-rw-r--r--src/mesa/drivers/dri/nouveau/nv20_swtcl.c30
3 files changed, 35 insertions, 18 deletions
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
index a330d5268b7..cc77b577ca4 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
@@ -26,6 +26,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "nouveau_fifo.h"
+#include "nouveau_lock.h"
#include "vblank.h"
#define RING_SKIPS 8
@@ -46,7 +47,7 @@ void WAIT_RING(nouveauContextPtr nmesa,u_int32_t size)
do { fifo_get = NV_FIFO_READ(NV03_FIFO_REGS_DMAGET); }
while(fifo_get <= RING_SKIPS);
}
- NV03_FIFO_REGS_DMAPUT(NV03_FIFO_REGS_DMAPUT, RING_SKIPS);
+ NV_FIFO_WRITE(NV03_FIFO_REGS_DMAPUT, RING_SKIPS);
nmesa->fifo.current = nmesa->fifo.put = RING_SKIPS;
nmesa->fifo.free = fifo_get - (RING_SKIPS + 1);
}
@@ -59,7 +60,7 @@ void WAIT_RING(nouveauContextPtr nmesa,u_int32_t size)
* Wait for the card to be idle
* XXX we should also wait for an empty fifo
*/
-void nouveauWaitForIdleLocked(nouveauContextPtr *nmesa)
+void nouveauWaitForIdleLocked(nouveauContextPtr nmesa)
{
int i,status;
@@ -82,12 +83,12 @@ void nouveauWaitForIdleLocked(nouveauContextPtr *nmesa)
break;
}
if (status)
- return 0;
+ return;
DO_USLEEP(1);
}
}
-void nouveauWaitForIdle(nouveauContextPtr *nmesa)
+void nouveauWaitForIdle(nouveauContextPtr nmesa)
{
LOCK_HARDWARE(nmesa);
nouveauWaitForIdleLocked(nmesa);
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_reg.h b/src/mesa/drivers/dri/nouveau/nouveau_reg.h
index 4f352830408..5f4b0624ad3 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_reg.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_reg.h
@@ -58,14 +58,20 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV03_FIFO_CMD_JUMP_OFFSET_MASK 0x1ffffffc
#define NV03_FIFO_CMD_REWIND (NV03_FIFO_CMD_JUMP | (0 & NV03_FIFO_CMD_JUMP_OFFSET_MASK))
+/* Vertex attributes */
+#define NV30_UNKNOWN_0 0x00001718
+#define NV30_VERTEX_ATTRIBUTES 0x00001740
+#define NV20_VERTEX_ATTRIBUTE(i) (0x00001760+i*4)
+#define NV20_VERTEX_ATTRIBUTE_TYPE_MASK 0x0000000f
+#define NV20_VERTEX_ATTRIBUTE_TYPE_FLOAT 0x00000002
+#define NV20_VERTEX_ATTRIBUTE_SIZE_MASK 0x000000f0
+
/* Rendering commands */
+#define NV10_PRIMITIVE 0x00000dfc
#define NV20_PRIMITIVE 0x000017fc
#define NV30_PRIMITIVE 0x00001808
+#define NV10_BEGIN_VERTICES 0x00001800
#define NV20_BEGIN_VERTICES 0x00001818
-/* Vertex attributes */
-#define NV20_VERTEX_ATTRIBUTE(i) (0x00001760+i*4)
-#define NV30_VERTEX_ATTRIBUTES 0x00001740
-#define NV30_UNKNOWN_0 0x00001718
diff --git a/src/mesa/drivers/dri/nouveau/nv20_swtcl.c b/src/mesa/drivers/dri/nouveau/nv20_swtcl.c
index 9f1327ba832..c493516e2a2 100644
--- a/src/mesa/drivers/dri/nouveau/nv20_swtcl.c
+++ b/src/mesa/drivers/dri/nouveau/nv20_swtcl.c
@@ -23,7 +23,7 @@
* DEALINGS IN THE SOFTWARE.
*/
-/* Software TCL for NV20, NV30, NV40, G70 */
+/* Software TCL for NV10, NV20, NV30, NV40, G70 */
#include <stdio.h>
#include <math.h>
@@ -67,24 +67,32 @@ static void nv20RasterPrimitive( GLcontext *ctx, GLenum rprim, GLuint hwprim );
/* the free room we want before we start a vertex batch. this is a performance-tunable */
-#define NV20_MIN_PRIM_SIZE (32/4)
+#define NOUVEAU_MIN_PRIM_SIZE (32/4)
/* the size above which we fire the ring. this is a performance-tunable */
-#define NV20_FIRE_SIZE (2048/4)
+#define NOUVEAU_FIRE_SIZE (2048/4)
static inline void nv20StartPrimitive(struct nouveau_context* nmesa)
{
- if (nmesa->screen->card_type==NV20)
+ if (nmesa->screen->card_type==NV_10)
+ BEGIN_RING_SIZE(channel,NV10_PRIMITIVE,1);
+ else if (nmesa->screen->card_type==NV_20)
BEGIN_RING_SIZE(channel,NV20_PRIMITIVE,1);
else
BEGIN_RING_SIZE(channel,NV30_PRIMITIVE,1);
OUT_RING(nmesa->current_primitive);
- BEGIN_RING_PRIM(channel,NV20_BEGIN_VERTICES,NV20_MIN_PRIM_SIZE);
+
+ if (nmesa->screen->card_type==NV_10)
+ BEGIN_RING_PRIM(channel,NV10_BEGIN_VERTICES,NOUVEAU_MIN_PRIM_SIZE);
+ else
+ BEGIN_RING_PRIM(channel,NV20_BEGIN_VERTICES,NOUVEAU_MIN_PRIM_SIZE);
}
static inline void nv20FinishPrimitive(struct nouveau_context *nmesa)
{
FINISH_RING_PRIM();
- if (nmesa->screen->card_type==NV20)
+ if (nmesa->screen->card_type==NV_10)
+ BEGIN_RING_SIZE(channel,NV10_PRIMITIVE,1);
+ else if (nmesa->screen->card_type==NV_20)
BEGIN_RING_SIZE(channel,NV20_PRIMITIVE,1);
else
BEGIN_RING_SIZE(channel,NV30_PRIMITIVE,1);
@@ -96,7 +104,7 @@ static inline void nv20FinishPrimitive(struct nouveau_context *nmesa)
static inline void nv20ExtendPrimitive(struct nouveau_context* nmesa, int size)
{
/* when the fifo has enough stuff (2048 bytes) or there is not enough room, fire */
- if ((RING_AHEAD()>=NV20_FIRE_SIZE)||(RING_AVAILABLE()<size/4))
+ if ((RING_AHEAD()>=NOUVEAU_FIRE_SIZE)||(RING_AVAILABLE()<size/4))
{
nv20FinishPrimitive(nmesa);
nv20StartPrimitive(nmesa);
@@ -681,19 +689,21 @@ static inline void nv20OutputVertexFormat(struct nouveau_context* nmesa, GLuint
/*
* Tell the hardware about the vertex format
*/
- if (nmesa->screen->card_type==NV_20) {
+ if (nmesa->screen->card_type==NV_10) {
+ // XXX needs some love
+ } else if (nmesa->screen->card_type==NV_20) {
for(i=0;i<16;i++)
{
int size=attr_size[i];
BEGIN_RING_SIZE(channel,NV20_VERTEX_ATTRIBUTE(i),1);
- OUT_RING(0x00000002|(size*0x10));
+ OUT_RING(NV20_VERTEX_ATTRIBUTE_TYPE_FLOAT|(size*0x10));
}
} else {
BEGIN_RING_SIZE(channel,NV30_VERTEX_ATTRIBUTES,slots);
for(i=0;i<slots;i++)
{
int size=attr_size[i];
- OUT_RING(0x00000002|(size*0x10));
+ OUT_RING(NV20_VERTEX_ATTRIBUTE_TYPE_FLOAT|(size*0x10));
}
BEGIN_RING_SIZE(channel,NV30_UNKNOWN_0,1);
OUT_RING(0);