intel: Expose more FBconfigs in the 3D driver.

We can support any combination of (a8r8g8b8, x8r8g8b8, r5g6b5) x (z0,z24,z24s8)
on either class of chipsets.  The only restriction is no mixing bpp when also
mixing tiling.  This shouldn't be occurring currently.

1 files changed, 4 insertions, 4 deletions

diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c
index 07e4ba07104..390b8f918a2 100644
--- a/src/mesa/drivers/dri/swrast/swrast.c
+++ b/src/mesa/drivers/dri/swrast/swrast.c
@@ -127,7 +127,7 @@ setupLoaderExtensions(__DRIscreen *psp,
     }
 }
 
-static __DRIconfig **
+static const __DRIconfig **
 swrastFillInModes(__DRIscreen *psp,
 		  unsigned pixel_bits, unsigned depth_bits,
 		  unsigned stencil_bits, GLboolean have_back_buffer)
@@ -187,7 +187,7 @@ swrastFillInModes(__DRIscreen *psp,
 	return NULL;
     }
 
-    return configs;
+    return (const __DRIconfig **)configs;
 }
 
 static __DRIscreen *
@@ -196,7 +196,7 @@ driCreateNewScreen(int scrn, const __DRIextension **extensions,
 {
     static const __DRIextension *emptyExtensionList[] = { NULL };
     __DRIscreen *psp;
-    __DRIconfig **configs8, **configs16, **configs32;
+    const __DRIconfig **configs8, **configs16, **configs32;
 
     (void) data;
 
@@ -215,7 +215,7 @@ driCreateNewScreen(int scrn, const __DRIextension **extensions,
     configs16 = swrastFillInModes(psp, 16, 16, 0, 1);
     configs32 = swrastFillInModes(psp, 32, 24, 8, 1);
 
-    configs16 = (__DRIconfig **)driConcatConfigs(configs8, configs16);
+    configs16 = driConcatConfigs(configs8, configs16);
 
     *driver_configs = driConcatConfigs(configs16, configs32);