Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/mesa into r600_state_predict

4 files changed, 41 insertions, 47 deletions

diff --git a/src/mesa/drivers/dri/r600/r600_cmdbuf.c b/src/mesa/drivers/dri/r600/r600_cmdbuf.c
index 10ea7668963..a330d5b151c 100644
--- a/src/mesa/drivers/dri/r600/r600_cmdbuf.c
+++ b/src/mesa/drivers/dri/r600/r600_cmdbuf.c
@@ -74,11 +74,11 @@ static struct radeon_cs * r600_cs_create(struct radeon_cs_manager *csm,
     return cs;
 }
 
-int r600_cs_write_reloc(struct radeon_cs *cs,
-                        struct radeon_bo *bo,
-                        uint32_t read_domain,
-                        uint32_t write_domain,
-                        uint32_t flags)
+static int r600_cs_write_reloc(struct radeon_cs *cs,
+			       struct radeon_bo *bo,
+			       uint32_t read_domain,
+			       uint32_t write_domain,
+			       uint32_t flags)
 {
     struct r600_cs_reloc_legacy *relocs;
     int i;
diff --git a/src/mesa/drivers/dri/r600/r600_cmdbuf.h b/src/mesa/drivers/dri/r600/r600_cmdbuf.h
index 06eddf2eeef..eba43d37b6b 100644
--- a/src/mesa/drivers/dri/r600/r600_cmdbuf.h
+++ b/src/mesa/drivers/dri/r600/r600_cmdbuf.h
@@ -134,40 +134,23 @@ struct r600_cs_reloc_legacy {
     uint32_t                *reloc_indices;
 };
 
-extern int r600_cs_write_reloc(struct radeon_cs *cs,
-                        struct radeon_bo *bo,
-                        uint32_t read_domain,
-                        uint32_t write_domain,
-                        uint32_t flags);
-
-static inline void r600_cs_write_dword(struct radeon_cs *cs, uint32_t dword)
-{
-    cs->packets[cs->cdw++] = dword;
-    if (cs->section) {
-	    cs->section_cdw++;
-    }
-}
-
 struct radeon_cs_manager * r600_radeon_cs_manager_legacy_ctor(struct radeon_context *ctx);
 
 /**
  * Write one dword to the command buffer.
  */
-#define R600_OUT_BATCH(data) \
-	do { \
-        r600_cs_write_dword(b_l_rmesa->cmdbuf.cs, data);\
-	} while(0)
+#define R600_OUT_BATCH(data)				\
+do {							\
+        radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, data);	\
+} while(0)
 
 /**
  * Write n dwords from ptr to the command buffer.
  */
-#define R600_OUT_BATCH_TABLE(ptr,n) \
-	do { \
-		int _i; \
-        for (_i=0; _i < n; _i++) {\
-            r600_cs_write_dword(b_l_rmesa->cmdbuf.cs, ptr[_i]);\
-        }\
-	} while(0)
+#define R600_OUT_BATCH_TABLE(ptr,n)		\
+do {						     \
+	radeon_cs_write_table(b_l_rmesa->cmdbuf.cs, ptr, n);	\
+} while(0)
 
 /**
  * Write a relocated dword to the command buffer.
@@ -178,7 +161,7 @@ struct radeon_cs_manager * r600_radeon_cs_manager_legacy_ctor(struct radeon_cont
             fprintf(stderr, "(%s:%s:%d) offset : %d\n",		\
             __FILE__, __FUNCTION__, __LINE__, offset);		\
         }							\
-        r600_cs_write_reloc(b_l_rmesa->cmdbuf.cs, 		\
+        radeon_cs_write_reloc(b_l_rmesa->cmdbuf.cs, 		\
                               bo, rd, wd, flags);		\
 	} while(0)
 
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 897c0fc8ee3..e03b060fd91 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -369,12 +369,12 @@ static GLboolean r700RunRender(GLcontext * ctx,
     r700WaitForIdleClean(context);
 
     rrb = radeon_get_colorbuffer(&context->radeon);
-    if (!rrb || !rrb->bo)
+    if (rrb && rrb->bo)
 	    r700SyncSurf(context, rrb->bo, 0, RADEON_GEM_DOMAIN_VRAM,
 			 CB_ACTION_ENA_bit | (1 << (id + 6)));
 
     rrb = radeon_get_depthbuffer(&context->radeon);
-    if (!rrb || !rrb->bo)
+    if (rrb && rrb->bo)
 	    r700SyncSurf(context, rrb->bo, 0, RADEON_GEM_DOMAIN_VRAM,
 			 DB_ACTION_ENA_bit | DB_DEST_BASE_ENA_bit);
 
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 75b2b72eb93..15f40b2771e 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -1349,14 +1349,33 @@ void r700SetScissor(context_t *context) //---------------
 		x2 = context->radeon.state.scissor.rect.x2 - 1;
 		y2 = context->radeon.state.scissor.rect.y2 - 1;
 	} else {
-		x1 = rrb->dPriv->x;
-		y1 = rrb->dPriv->y;
-		x2 = rrb->dPriv->x + rrb->dPriv->w;
-		y2 = rrb->dPriv->y + rrb->dPriv->h;
+		if (context->radeon.radeonScreen->driScreen->dri2.enabled) {
+			x1 = 0;
+			y1 = 0;
+			x2 = rrb->base.Width - 1;
+			y2 = rrb->base.Height - 1;
+		} else {
+			x1 = rrb->dPriv->x;
+			y1 = rrb->dPriv->y;
+			x2 = rrb->dPriv->x + rrb->dPriv->w;
+			y2 = rrb->dPriv->y + rrb->dPriv->h;
+		}
 	}
 
 	R600_STATECHANGE(context, scissor);
 
+	/* screen */
+	SETbit(r700->PA_SC_SCREEN_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
+	SETfield(r700->PA_SC_SCREEN_SCISSOR_TL.u32All, x1,
+		 PA_SC_SCREEN_SCISSOR_TL__TL_X_shift, PA_SC_SCREEN_SCISSOR_TL__TL_X_mask);
+	SETfield(r700->PA_SC_SCREEN_SCISSOR_TL.u32All, y1,
+		 PA_SC_SCREEN_SCISSOR_TL__TL_Y_shift, PA_SC_SCREEN_SCISSOR_TL__TL_Y_mask);
+
+	SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All, x2,
+		 PA_SC_SCREEN_SCISSOR_BR__BR_X_shift, PA_SC_SCREEN_SCISSOR_BR__BR_X_mask);
+	SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All, y2,
+		 PA_SC_SCREEN_SCISSOR_BR__BR_Y_shift, PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask);
+
 	/* window */
 	SETbit(r700->PA_SC_WINDOW_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
 	SETfield(r700->PA_SC_WINDOW_SCISSOR_TL.u32All, x1,
@@ -1749,21 +1768,13 @@ void r700InitState(GLcontext * ctx) //-------------------
     /* default shader connections. */
     r700->SPI_VS_OUT_ID_0.u32All  = 0x03020100;
     r700->SPI_VS_OUT_ID_1.u32All  = 0x07060504;
+    r700->SPI_VS_OUT_ID_2.u32All  = 0x0b0a0908;
+    r700->SPI_VS_OUT_ID_3.u32All  = 0x0f0e0d0c;
 
     r700->SPI_THREAD_GROUPING.u32All = 0;
     if (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV770)
 	    SETfield(r700->SPI_THREAD_GROUPING.u32All, 1, PS_GROUPING_shift, PS_GROUPING_mask);
 
-    /* screen */
-    r700->PA_SC_SCREEN_SCISSOR_TL.u32All = 0x0;
-
-    SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All,
-	     ((RADEONDRIPtr)(context->radeon.radeonScreen->driScreen->pDevPriv))->width,
-	     PA_SC_SCREEN_SCISSOR_BR__BR_X_shift, PA_SC_SCREEN_SCISSOR_BR__BR_X_mask);
-    SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All,
-	     ((RADEONDRIPtr)(context->radeon.radeonScreen->driScreen->pDevPriv))->height,
-	     PA_SC_SCREEN_SCISSOR_BR__BR_Y_shift, PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask);
-
     /* 4 clip rectangles */ /* TODO : set these clip rects according to context->currentDraw->numClipRects */
     r700->PA_SC_CLIPRECT_RULE.u32All = 0;
     SETfield(r700->PA_SC_CLIPRECT_RULE.u32All, CLIP_RULE_mask, CLIP_RULE_shift, CLIP_RULE_mask);