Huge dumb drop. State:

- Color buffer clear is accelerated, but flickers (possibly caused by a
  recent DDX or Mesa change or bad merge)
- Everything else uses software fallback rendering
- There should be no clipping-related artifacts with the
  sw-clipspan-fixes.patch against Mesa (posted on dri-devel)
- Multiple clients should be rock solid with a DDX patch that is soon to
  come (soon = within the next hour or so)

1 files changed, 27 insertions, 15 deletions

diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index 7c51e10a171..7d124d7285e 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -66,7 +66,8 @@ int r300FlushCmdBuf(r300ContextPtr r300, const char* caller)
 		start = r300->cmdbuf.count_reemit;
 
 	if (RADEON_DEBUG & DEBUG_IOCTL) {
-		fprintf(stderr, "%s from %s\n", __FUNCTION__, caller);
+		fprintf(stderr, "%s from %s - %i cliprects\n",
+			__FUNCTION__, caller, r300->radeon.numClipRects);
 
 		if (RADEON_DEBUG & DEBUG_VERBOSE)
 			for (i = start; i < r300->cmdbuf.count_used; ++i)
@@ -91,17 +92,22 @@ int r300FlushCmdBuf(r300ContextPtr r300, const char* caller)
 	}
 #endif
 
-	ret = drmCommandWrite(r300->radeon.dri.fd,
-			      DRM_RADEON_CMDBUF, &cmd, sizeof(cmd));
-	if (ret) {
-		UNLOCK_HARDWARE(&r300->radeon);
-		fprintf(stderr, "drmCommandWrite: %d\n", ret);
-		exit(-1);
-	}
+	if (cmd.nbox) {
+		ret = drmCommandWrite(r300->radeon.dri.fd,
+				DRM_RADEON_CMDBUF, &cmd, sizeof(cmd));
+		if (ret) {
+			UNLOCK_HARDWARE(&r300->radeon);
+			fprintf(stderr, "drmCommandWrite: %d\n", ret);
+			exit(-1);
+		}
 
-	if (RADEON_DEBUG & DEBUG_SYNC) {
-		fprintf(stderr, "Syncing in %s\n\n", __FUNCTION__);
-		radeonWaitForIdleLocked(&r300->radeon);
+		if (RADEON_DEBUG & DEBUG_SYNC) {
+			fprintf(stderr, "Syncing in %s\n\n", __FUNCTION__);
+			radeonWaitForIdleLocked(&r300->radeon);
+		}
+	} else {
+		if (RADEON_DEBUG & DEBUG_IOCTL)
+			fprintf(stderr, "%s: No cliprects\n", __FUNCTION__);
 	}
 
 	UNLOCK_HARDWARE(&r300->radeon);
@@ -109,7 +115,7 @@ int r300FlushCmdBuf(r300ContextPtr r300, const char* caller)
 	r300->cmdbuf.count_used = 0;
 	r300->cmdbuf.count_reemit = 0;
 
-	return ret;
+	return 0;
 }
 
 
@@ -310,6 +316,8 @@ void r300InitCmdBuf(r300ContextPtr r300)
 		r300->hw.unk4200.cmd[0] = cmducs(0x4200, 4);
 	ALLOC_STATE( unk4214, always, 2, "unk4214", 0 );
 		r300->hw.unk4214.cmd[0] = cmducs(0x4214, 1);
+	ALLOC_STATE( ps, always, R300_PS_CMDSIZE, "ps", 0 );
+		r300->hw.ps.cmd[0] = cmducs(R300_RE_POINTSIZE, 1);
 	ALLOC_STATE( unk4230, always, 4, "unk4230", 0 );
 		r300->hw.unk4230.cmd[0] = cmducs(0x4230, 3);
 	ALLOC_STATE( unk4260, always, 4, "unk4260", 0 );
@@ -332,8 +340,8 @@ void r300InitCmdBuf(r300ContextPtr r300)
 		r300->hw.rr.cmd[R300_RR_CMD_0] = cmducs(R300_RS_ROUTE_0, 1);
 	ALLOC_STATE( unk43A4, always, 3, "unk43A4", 0 );
 		r300->hw.unk43A4.cmd[0] = cmducs(0x43A4, 2);
-	ALLOC_STATE( unk43E0, always, 4, "unk43E0", 0 );
-		r300->hw.unk43E0.cmd[0] = cmducs(0x43E0, 3);
+	ALLOC_STATE( unk43E8, always, 2, "unk43E8", 0 );
+		r300->hw.unk43E8.cmd[0] = cmducs(0x43E8, 1);
 	ALLOC_STATE( fp, always, R300_FP_CMDSIZE, "fp", 0 );
 		r300->hw.fp.cmd[R300_FP_CMD_0] = cmducs(R300_PFS_CNTL_0, 3);
 		r300->hw.fp.cmd[R300_FP_CMD_1] = cmducs(R300_PFS_NODE_0, 4);
@@ -389,6 +397,8 @@ void r300InitCmdBuf(r300ContextPtr r300)
 		r300->hw.vpi.cmd[R300_VPI_CMD_0] = cmdvpu(R300_PVS_UPLOAD_PROGRAM, 0);
 	ALLOC_STATE( vpp, vpu, R300_VPP_CMDSIZE, "vpp", 0 );
 		r300->hw.vpp.cmd[R300_VPP_CMD_0] = cmdvpu(R300_PVS_UPLOAD_PARAMETERS, 0);
+	ALLOC_STATE( vps, vpu, R300_VPS_CMDSIZE, "vps", 0 );
+		r300->hw.vps.cmd[R300_VPS_CMD_0] = cmdvpu(R300_PVS_UPLOAD_POINTSIZE, 1);
 
 	/* Setup the atom linked list */
 	make_empty_list(&r300->hw.atomlist);
@@ -413,6 +423,7 @@ void r300InitCmdBuf(r300ContextPtr r300)
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.txe);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4200);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4214);
+	insert_at_tail(&r300->hw.atomlist, &r300->hw.ps);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4230);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4260);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.unk4274);
@@ -424,7 +435,7 @@ void r300InitCmdBuf(r300ContextPtr r300)
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.ri);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.rr);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.unk43A4);
-	insert_at_tail(&r300->hw.atomlist, &r300->hw.unk43E0);
+	insert_at_tail(&r300->hw.atomlist, &r300->hw.unk43E8);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.fp);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.unk46A4);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.fpi[0]);
@@ -452,6 +463,7 @@ void r300InitCmdBuf(r300ContextPtr r300)
 
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.vpi);
 	insert_at_tail(&r300->hw.atomlist, &r300->hw.vpp);
+	insert_at_tail(&r300->hw.atomlist, &r300->hw.vps);
 
 	r300->hw.is_dirty = GL_TRUE;
 	r300->hw.all_dirty = GL_TRUE;