diff options
author | Stephane Marchesin <[email protected]> | 2006-02-23 12:55:56 +0000 |
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committer | Stephane Marchesin <[email protected]> | 2006-02-23 12:55:56 +0000 |
commit | 0abf3937ce651d26b18a3ab93ed916f3e7bd04dd (patch) | |
tree | d766c3d8f211d41efd615b448c3bedf586e12d4d /src/mesa/drivers/dri/nouveau/nouveau_fifo.h |
Initial revision
Diffstat (limited to 'src/mesa/drivers/dri/nouveau/nouveau_fifo.h')
-rw-r--r-- | src/mesa/drivers/dri/nouveau/nouveau_fifo.h | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h new file mode 100644 index 00000000000..6a21687551b --- /dev/null +++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h @@ -0,0 +1,96 @@ +/************************************************************************** + +Copyright 2006 Stephane Marchesin +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + + + +#ifndef __NOUVEAU_FIFO_H__ +#define __NOUVEAU_FIFO_H__ + +#include "nouveau_context.h" + +#define NV_READ(reg) *(volatile u_int32_t *)(nmesa->mmio + (reg)) + +#define NV_FIFO_READ(reg) *(volatile u_int32_t *)(nmesa->fifo_mmio + (reg)) +#define NV_FIFO_WRITE(reg,value) *(volatile u_int32_t *)(nmesa->fifo_mmio + (reg)) = value; + +/* + * Ring/fifo interface + * + * - Begin a ring section with BEGIN_RING_SIZE (if you know the full size in advance) + * - Begin a ring section with BEGIN_RING_PRIM otherwise (and then finish with FINISH_RING_PRIM) + * - Output stuff to the ring with either OUT_RINGp (outputs a raw mem chunk), OUT_RING (1 uint32_t) or OUT_RINGf (1 float) + * - RING_AVAILABLE returns the available fifo (in uint32_ts) + * - RING_AHEAD returns how much ahead of the last submission point we are + * - FIRE_RING fire whatever we have that wasn't fired before + * - WAIT_RING waits for size (in uint32_ts) to be available in the fifo + */ + +#define OUT_RINGp(ptr,sz) do{ \ + memcpy(nmesa->fifo.buffer+nmesa->fifo.current,ptr,sz); \ + nmesa->fifo.current+=sz; \ +}while(0) + +#define OUT_RING(n) do { \ +nmesa->fifo.buffer[nmesa->fifo.current++]=n; \ +}while(0) + +#define OUT_RINGf(n) do { \ +*((float*)(nmesa->fifo.buffer+nmesa->fifo.current++))=n; \ +}while(0) + +extern void WAIT_RING(nouveauContextPtr nmesa,u_int32_t size); + +#define BEGIN_RING_PRIM(subchannel,tag,size) do { \ + if (nmesa->fifo.free<size) \ + WAIT_RING(nmesa,(size)); \ + OUT_RING( ((subchannel) << 13) | (tag)); \ +}while(0) + +#define FINISH_RING_PRIM() do{ \ + nmesa->fifo.buffer[nmesa->fifo.put]|=((nmesa->fifo.current-nmesa->fifo.put) << 18); \ +}while(0) + +#define BEGIN_RING_SIZE(subchannel,tag,size) do { \ + if (nmesa->fifo.free<size) \ + WAIT_RING(nmesa,(size)); \ + OUT_RING( (size<<18) | ((subchannel) << 13) | (tag)); \ +}while(0) + +#define RING_AVAILABLE() (nmesa->fifo.free-1) + +#define RING_AHEAD() ((nmesa->fifo.put<=nmesa->fifo.current)?(nmesa->fifo.current-nmesa->fifo.put):nmesa->fifo.max-nmesa->fifo.put+nmesa->fifo.current) + +#define FIRE_RING() do { \ + if (nmesa->fifo.current!=nmesa->fifo.put) {\ + nmesa->fifo.put=nmesa->fifo.current;\ + NV_FIFO_WRITE(NV03_FIFO_REGS_DMAPUT,nmesa->fifo.put);\ + }\ +}while(0) + + +#endif /* __NOUVEAU_FIFO_H__ */ + + |