diff options
| author | Eric Anholt <[email protected]> | 2009-06-04 10:21:29 +0000 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2009-06-04 10:34:52 +0000 |
| commit | 165ae5e2fb57bdb64b4cf01271b4effeb811f675 (patch) | |
| tree | ec87bebf0363e14a9eedfed93a019c7dee91fa86 /src/mesa/drivers/dri/intel/intel_reg.h | |
| parent | 1b6f7fb7d5a9756c97e2ac2f5390b0d2333acf55 (diff) | |
i915: Don't rely on fence regs when we don't have to.
We're on the way to telling the kernel about when we need fence regs on our
objects or not, and this will cut the number of places needing them.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_reg.h')
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_reg.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_reg.h b/src/mesa/drivers/dri/intel/intel_reg.h index 57ac8f0cc14..d19f1bae34c 100644 --- a/src/mesa/drivers/dri/intel/intel_reg.h +++ b/src/mesa/drivers/dri/intel/intel_reg.h @@ -189,6 +189,19 @@ #define S7_DEPTH_OFFSET_CONST_MASK ~0 +/* p143 */ +#define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) +/* Dword 1 */ +#define BUF_3D_ID_COLOR_BACK (0x3<<24) +#define BUF_3D_ID_DEPTH (0x7<<24) +#define BUF_3D_USE_FENCE (1<<23) +#define BUF_3D_TILED_SURFACE (1<<22) +#define BUF_3D_TILE_WALK_X 0 +#define BUF_3D_TILE_WALK_Y (1<<21) +#define BUF_3D_PITCH(x) (((x)/4)<<2) +/* Dword 2 */ +#define BUF_3D_ADDR(x) ((x) & ~0x3) + /* Primitive dispatch on 830-945 */ #define _3DPRIMITIVE (CMD_3D | (0x1f << 24)) #define PRIM_INDIRECT (1<<23) |