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authorKeith Packard <[email protected]>2008-05-06 10:51:08 -0700
committerKeith Packard <[email protected]>2008-05-06 10:51:08 -0700
commit537bbe6dec780f6f85838fe7e6036579c509f8a6 (patch)
tree7dc9de58092c619a32d7b14d8ab5b575812c8a70 /src/mesa/drivers/dri/intel/intel_fbo.h
parentdf4b49c2cedde60c02f869977ee426f280b2985b (diff)
[intel-GEM] Add tiling support to swrast.
Accessing tiled surfaces without using the fence registers requires that software deal with the address swizzling itself.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_fbo.h')
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.h b/src/mesa/drivers/dri/intel/intel_fbo.h
index c90c84b48c2..9e085a1992f 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.h
+++ b/src/mesa/drivers/dri/intel/intel_fbo.h
@@ -72,6 +72,7 @@ struct intel_renderbuffer
struct intel_region *region;
void *pfMap; /* possibly paged flipped map pointer */
GLuint pfPitch; /* possibly paged flipped pitch */
+ int tiling;
GLboolean RenderToTexture; /* RTT? */
GLuint PairedDepth; /**< only used if this is a depth renderbuffer */
@@ -90,7 +91,7 @@ intel_renderbuffer_set_region(struct intel_renderbuffer *irb,
struct intel_region *region);
extern struct intel_renderbuffer *
-intel_create_renderbuffer(GLenum intFormat);
+intel_create_renderbuffer(GLenum intFormat, int tiling);
extern void intel_fbo_init(struct intel_context *intel);