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| author | Eric Anholt <[email protected]> | 2012-12-05 16:17:58 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2012-12-14 15:18:14 -0800 |
| commit | 4df1e18864dc6b7830bb3c7998889883fe8dae2b (patch) | |
| tree | a52ec4410042279bcd6f04ed1f77b76f1510a6aa /src/mesa/drivers/dri/intel/intel_blit.h | |
| parent | 6255fc7426ce51b3bd1b28af45f4977fdcc37a55 (diff) | |
i965/fs: Fix the clock increment in scheduling.
I've tested this to be true with various ALU ops on gen7 (with the
exception of MADs, which go at either 3 or 4 cycles per dispatch).
Acked-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_blit.h')
0 files changed, 0 insertions, 0 deletions