diff options
| author | Kenneth Graunke <[email protected]> | 2014-05-10 01:59:10 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2014-06-26 11:50:34 -0700 |
| commit | a248b2a4ebb27832d6c8a40ce2b10134f8735b93 (patch) | |
| tree | 2d47d56eee67ae93a2fd129e4cf3a3ac4a13035b /src/mesa/drivers/dri/i965 | |
| parent | e10311be9f61230de7f06e9fb30834835ba3677d (diff) | |
i965: Hook up the MCS buffers in SURFACE_STATE on Broadwell.
MCS buffers are never allocated on Broadwell, so this does nothing for
now, but puts the infrastructure in place for when they do exist.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Reviewed-by: Ben Widawsky <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_surface_state.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 0268e5c70a8..72983f54ffd 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -157,6 +157,11 @@ gen8_update_texture_surface(struct gl_context *ctx, pitch = mt->pitch; } + if (mt->mcs_mt) { + aux_mt = mt->mcs_mt; + aux_mode = GEN8_SURFACE_AUX_MODE_MCS; + } + /* If this is a view with restricted NumLayers, then our effective depth * is not just the miptree depth. */ @@ -355,6 +360,11 @@ gen8_update_renderbuffer_surface(struct brw_context *brw, __FUNCTION__, _mesa_get_format_name(rb_format)); } + if (mt->mcs_mt) { + aux_mt = mt->mcs_mt; + aux_mode = GEN8_SURFACE_AUX_MODE_MCS; + } + uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 13 * 4, 64, &brw->wm.base.surf_offset[surf_index]); |