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authorJason Ekstrand <[email protected]>2016-04-18 18:51:50 -0700
committerJason Ekstrand <[email protected]>2016-04-20 09:15:01 -0700
commit9f16e170fed09821bb1b18a9dbe548f3d26b7977 (patch)
treebc1aa9600f0be836ef70c748cbbab2bda221fcfb /src/mesa/drivers/dri/i965
parentf63a95080f240bed9cea3619f4ab43e8dc87292c (diff)
i965/vec4: Use nir_intrinsic_base in the load_uniform implementation
We shouldn't be reading the const_index directly Reviewed-by: Iago Toral Quiroga <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94998 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95001
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_nir.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index e199d9697dc..b5c23c99588 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -691,7 +691,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
dest = get_nir_dest(instr->dest);
- src = src_reg(dst_reg(UNIFORM, instr->const_index[0] / 16));
+ src = src_reg(dst_reg(UNIFORM, nir_intrinsic_base(instr) / 16));
src.type = dest.type;
/* Uniforms don't actually have to be vec4 aligned. In the case that