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authorEric Anholt <[email protected]>2007-12-12 10:25:19 -0800
committerEric Anholt <[email protected]>2007-12-12 11:52:10 -0800
commit7c71ef3a3d0cf2620525f468960cdc76a0fb0d33 (patch)
tree7b7e071b5c854bc5b737401990b54e488febf650 /src/mesa/drivers/dri/i965
parent00e10a1385bfd376f5f45ad94e3543ac87f15de8 (diff)
[intel] Move bufmgr back to context instead of screen, fixing glthreads.
Putting the bufmgr in the screen is not thread-safe since the emit_reloc changes. It also led to a significant performance hit from pthread usage for the attempted thread-safety (up to 12% of a cpu spent on refcounting protection in single-threaded 965). The motivation had been to allow multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_pool.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_state.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_buffer_objects.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_context.c128
-rw-r--r--src/mesa/drivers/dri/i965/intel_context.h25
-rw-r--r--src/mesa/drivers/dri/i965/intel_ioctl.c26
-rw-r--r--src/mesa/drivers/dri/i965/intel_ioctl.h4
-rw-r--r--src/mesa/drivers/dri/i965/intel_regions.c151
-rw-r--r--src/mesa/drivers/dri/i965/intel_regions.h2
-rw-r--r--src/mesa/drivers/dri/i965/intel_screen.c136
-rw-r--r--src/mesa/drivers/dri/i965/intel_screen.h18
12 files changed, 214 insertions, 286 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 87e2202029b..b2c6aa7dbac 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -472,7 +472,7 @@ void brw_draw_init( struct brw_context *brw )
/* Set the internal VBOs to no-backing-store. We only use them as a
* temporary within a brw_try_draw_prims while the lock is held.
*/
- if (!brw->intel.intelScreen->ttm) {
+ if (!brw->intel.ttm) {
struct intel_buffer_object *intel_bo =
intel_buffer_object(brw->vb.upload.vbo[i]);
diff --git a/src/mesa/drivers/dri/i965/brw_state_pool.c b/src/mesa/drivers/dri/i965/brw_state_pool.c
index 0fc3a1a871e..148bb516a69 100644
--- a/src/mesa/drivers/dri/i965/brw_state_pool.c
+++ b/src/mesa/drivers/dri/i965/brw_state_pool.c
@@ -88,7 +88,7 @@ static void brw_init_pool( struct brw_context *brw,
pool->size = size;
pool->brw = brw;
- pool->buffer = dri_bo_alloc(brw->intel.intelScreen->bufmgr,
+ pool->buffer = dri_bo_alloc(brw->intel.bufmgr,
(pool_id == BRW_GS_POOL) ? "GS pool" : "SS pool",
size, 4096, DRM_BO_FLAG_MEM_TT);
@@ -97,7 +97,7 @@ static void brw_init_pool( struct brw_context *brw,
* the contents at approximately the same cost as the memcpy, and only
* if the contents are lost.
*/
- if (!brw->intel.intelScreen->ttm) {
+ if (!brw->intel.ttm) {
dri_bo_fake_disable_backing_store(pool->buffer, brw_invalidate_pool_cb,
pool);
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c
index a9cdeb88747..76865217bff 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_state.c
@@ -81,7 +81,7 @@ static void upload_wm_unit(struct brw_context *brw )
brw->wm.scratch_buffer = NULL;
}
if (!brw->wm.scratch_buffer) {
- brw->wm.scratch_buffer = dri_bo_alloc(intel->intelScreen->bufmgr,
+ brw->wm.scratch_buffer = dri_bo_alloc(intel->bufmgr,
"wm scratch",
brw->wm.scratch_buffer_size,
4096, DRM_BO_FLAG_MEM_TT);
diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index 6ed31c9458a..56c1666ac69 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -39,7 +39,7 @@ static void
intel_bufferobj_alloc_buffer(struct intel_context *intel,
struct intel_buffer_object *intel_obj)
{
- intel_obj->buffer = dri_bo_alloc(intel->intelScreen->bufmgr, "bufferobj",
+ intel_obj->buffer = dri_bo_alloc(intel->bufmgr, "bufferobj",
intel_obj->Base.Size, 64,
DRM_BO_FLAG_MEM_TT);
}
diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c
index 473720915ed..fb95c492eb6 100644
--- a/src/mesa/drivers/dri/i965/intel_context.c
+++ b/src/mesa/drivers/dri/i965/intel_context.c
@@ -59,8 +59,9 @@
#include "intel_regions.h"
#include "intel_buffer_objects.h"
#include "intel_decode.h"
+#include "intel_bufmgr_ttm.h"
-#include "dri_bufmgr.h"
+#include "i915_drm.h"
#include "utils.h"
#include "vblank.h"
@@ -315,6 +316,82 @@ intelEndQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
intel->stats_wm--;
}
+/** Driver-specific fence emit implementation for the fake memory manager. */
+static unsigned int
+intel_fence_emit(void *private)
+{
+ struct intel_context *intel = (struct intel_context *)private;
+ unsigned int fence;
+
+ /* XXX: Need to emit a flush, if we haven't already (at least with the
+ * current batchbuffer implementation, we have).
+ */
+
+ fence = intelEmitIrqLocked(intel);
+
+ return fence;
+}
+
+/** Driver-specific fence wait implementation for the fake memory manager. */
+static int
+intel_fence_wait(void *private, unsigned int cookie)
+{
+ struct intel_context *intel = (struct intel_context *)private;
+
+ intelWaitIrq(intel, cookie);
+
+ return 0;
+}
+
+static GLboolean
+intel_init_bufmgr(struct intel_context *intel)
+{
+ intelScreenPrivate *intelScreen = intel->intelScreen;
+ GLboolean ttm_disable = getenv("INTEL_NO_TTM") != NULL;
+
+ /* If we've got a new enough DDX that's initializing TTM and giving us
+ * object handles for the shared buffers, use that.
+ */
+ intel->ttm = GL_FALSE;
+ if (!ttm_disable &&
+ intel->intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
+ intel->intelScreen->drmMinor >= 11 &&
+ intel->intelScreen->front.bo_handle != -1)
+ {
+ intel->bufmgr = intel_bufmgr_ttm_init(intel->driFd,
+ DRM_FENCE_TYPE_EXE,
+ DRM_FENCE_TYPE_EXE |
+ DRM_I915_FENCE_TYPE_RW,
+ BATCH_SZ);
+ if (intel->bufmgr != NULL)
+ intel->ttm = GL_TRUE;
+ }
+ /* Otherwise, use the classic buffer manager. */
+ if (intel->bufmgr == NULL) {
+ if (ttm_disable) {
+ fprintf(stderr, "TTM buffer manager disabled. Using classic.\n");
+ } else {
+ fprintf(stderr, "Failed to initialize TTM buffer manager. "
+ "Falling back to classic.\n");
+ }
+
+ if (intelScreen->tex.size == 0) {
+ fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
+ __func__, __LINE__);
+ return GL_FALSE;
+ }
+
+ intel->bufmgr = dri_bufmgr_fake_init(intelScreen->tex.offset,
+ intelScreen->tex.map,
+ intelScreen->tex.size,
+ intel_fence_emit,
+ intel_fence_wait,
+ intel);
+ }
+
+ return GL_TRUE;
+}
+
void intelInitDriverFunctions( struct dd_function_table *functions )
{
@@ -340,24 +417,6 @@ void intelInitDriverFunctions( struct dd_function_table *functions )
intelInitBufferFuncs( functions );
}
-static void
-intel_update_screen_regions(struct intel_context *intel)
-{
- intel->bufmgr = intel->intelScreen->bufmgr;
-
- intel_region_release(intel, &intel->front_region);
- intel_region_reference(&intel->front_region,
- intel->intelScreen->front_region);
-
- intel_region_release(intel, &intel->back_region);
- intel_region_reference(&intel->back_region,
- intel->intelScreen->back_region);
-
- intel_region_release(intel, &intel->depth_region);
- intel_region_reference(&intel->depth_region,
- intel->intelScreen->depth_region);
-}
-
GLboolean intelInitContext( struct intel_context *intel,
const __GLcontextModes *mesaVis,
__DRIcontextPrivate *driContextPriv,
@@ -384,6 +443,16 @@ GLboolean intelInitContext( struct intel_context *intel,
intel->driScreen = sPriv;
intel->sarea = saPriv;
+ /* Dri stuff */
+ intel->hHWContext = driContextPriv->hHWContext;
+ intel->driFd = sPriv->fd;
+ intel->driHwLock = (drmLock *) &sPriv->pSAREA->lock;
+
+ intel->maxBatchSize = BATCH_SZ;
+
+ if (!intel_init_bufmgr(intel))
+ return GL_FALSE;
+
driParseConfigFiles (&intel->optionCache, &intelScreen->optionCache,
intel->driScreen->myNum, "i965");
@@ -431,11 +500,6 @@ GLboolean intelInitContext( struct intel_context *intel,
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
- /* Dri stuff */
- intel->hHWContext = driContextPriv->hHWContext;
- intel->driFd = sPriv->fd;
- intel->driHwLock = (drmLock *) &sPriv->pSAREA->lock;
-
intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
intel->hw_stipple = 1;
@@ -470,10 +534,10 @@ GLboolean intelInitContext( struct intel_context *intel,
INTEL_DEBUG = driParseDebugString( getenv( "INTEL_DEBUG" ),
debug_control );
- if (!intel->intelScreen->ttm && (INTEL_DEBUG & DEBUG_BUFMGR))
- dri_bufmgr_fake_set_debug(intel->intelScreen->bufmgr, GL_TRUE);
+ if (!intel->ttm && (INTEL_DEBUG & DEBUG_BUFMGR))
+ dri_bufmgr_fake_set_debug(intel->bufmgr, GL_TRUE);
- intel_update_screen_regions(intel);
+ intel_recreate_static_regions(intel);
intel_bufferobj_init( intel );
intel->batch = intel_batchbuffer_alloc( intel );
@@ -493,12 +557,16 @@ GLboolean intelInitContext( struct intel_context *intel,
/* DRI_TEXMGR_DO_TEXTURE_2D | */
/* DRI_TEXMGR_DO_TEXTURE_RECT ); */
-
+ /* Force all software fallbacks */
if (getenv("INTEL_NO_RAST")) {
fprintf(stderr, "disabling 3D rasterization\n");
intel->no_rast = 1;
}
+ /* Disable all hardware rendering (skip emitting batches and fences/waits
+ * to the kernel)
+ */
+ intel->no_hw = getenv("INTEL_NO_HW") != NULL;
return GL_TRUE;
}
@@ -643,9 +711,9 @@ static void intelContendedLock( struct intel_context *intel, GLuint flags )
* between contexts of a single fake bufmgr, but this will at least make
* things correct for now.
*/
- if (!intel->intelScreen->ttm && sarea->texAge != intel->hHWContext) {
+ if (!intel->ttm && sarea->texAge != intel->hHWContext) {
sarea->texAge = intel->hHWContext;
- dri_bufmgr_fake_contended_lock_take(intel->intelScreen->bufmgr);
+ dri_bufmgr_fake_contended_lock_take(intel->bufmgr);
if (INTEL_DEBUG & DEBUG_BATCH)
intel_decode_context_reset();
if (INTEL_DEBUG & DEBUG_BUFMGR) {
diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h
index 4aa9413bec8..17612acdaf2 100644
--- a/src/mesa/drivers/dri/i965/intel_context.h
+++ b/src/mesa/drivers/dri/i965/intel_context.h
@@ -157,13 +157,28 @@ struct intel_context
GLint refcount;
GLuint Fallback;
GLuint NewGLState;
-
+
+ dri_bufmgr *bufmgr;
+ unsigned int maxBatchSize;
+
+ struct intel_region *front_region;
+ struct intel_region *back_region;
+ struct intel_region *third_region;
+ struct intel_region *depth_region;
+
+ /**
+ * This value indicates that the kernel memory manager is being used
+ * instead of the fake client-side memory manager.
+ */
+ GLboolean ttm;
+
dri_fence *first_swap_fence;
dri_fence *last_swap_fence;
GLuint stats_wm;
struct intel_batchbuffer *batch;
+ unsigned batch_id;
GLubyte clear_chan[4];
GLuint ClearColor;
@@ -205,12 +220,6 @@ struct intel_context
drmLock *driHwLock;
int driFd;
- /* Cached values from the screen private. */
- dri_bufmgr *bufmgr;
- struct intel_region *front_region;
- struct intel_region *back_region;
- struct intel_region *depth_region;
-
__DRIdrawablePrivate *driDrawable;
__DRIdrawablePrivate *driReadDrawable;
__DRIscreenPrivate *driScreen;
@@ -219,6 +228,8 @@ struct intel_context
GLuint lastStamp;
+ GLboolean no_hw;
+
/**
* Configuration cache
*/
diff --git a/src/mesa/drivers/dri/i965/intel_ioctl.c b/src/mesa/drivers/dri/i965/intel_ioctl.c
index 50ad4e4f1f6..91677c0c52f 100644
--- a/src/mesa/drivers/dri/i965/intel_ioctl.c
+++ b/src/mesa/drivers/dri/i965/intel_ioctl.c
@@ -52,15 +52,15 @@ static void intelWaitIdleLocked( struct intel_context *intel )
if (INTEL_DEBUG & DEBUG_SYNC)
fprintf(stderr, "waiting for idle\n");
- fence = intelEmitIrqLocked(intel->intelScreen);
- intelWaitIrq(intel->intelScreen, fence);
+ fence = intelEmitIrqLocked(intel);
+ intelWaitIrq(intel, fence);
}
-int intelEmitIrqLocked( intelScreenPrivate *intelScreen )
+int intelEmitIrqLocked( struct intel_context *intel )
{
int seq = 1;
- if (!intelScreen->no_hw) {
+ if (!intel->no_hw) {
drmI830IrqEmit ie;
int ret;
/*
@@ -69,7 +69,7 @@ int intelEmitIrqLocked( intelScreenPrivate *intelScreen )
*/
ie.irq_seq = &seq;
- ret = drmCommandWriteRead( intelScreen->driScrnPriv->fd,
+ ret = drmCommandWriteRead( intel->driFd,
DRM_I830_IRQ_EMIT,
&ie, sizeof(ie) );
if ( ret ) {
@@ -84,14 +84,12 @@ int intelEmitIrqLocked( intelScreenPrivate *intelScreen )
return seq;
}
-void intelWaitIrq( intelScreenPrivate *intelScreen, int seq )
+void intelWaitIrq( struct intel_context *intel, int seq )
{
- if (!intelScreen->no_hw) {
+ if (!intel->no_hw) {
drmI830IrqWait iw;
int ret, lastdispatch;
- volatile drmI830Sarea *sarea = (volatile drmI830Sarea *)
- (((GLubyte *)intelScreen->driScrnPriv->pSAREA) +
- intelScreen->sarea_priv_offset);
+ volatile drmI830Sarea *sarea = intel->sarea;
if (0)
fprintf(stderr, "%s %d\n", __FUNCTION__, seq );
@@ -100,7 +98,7 @@ void intelWaitIrq( intelScreenPrivate *intelScreen, int seq )
do {
lastdispatch = sarea->last_dispatch;
- ret = drmCommandWrite( intelScreen->driScrnPriv->fd,
+ ret = drmCommandWrite( intel->driFd,
DRM_I830_IRQ_WAIT, &iw, sizeof(iw) );
/* This seems quite often to return before it should!?!
@@ -151,7 +149,7 @@ void intel_batch_ioctl( struct intel_context *intel,
batch.start,
batch.start + batch.used * 4);
- if (!intel->intelScreen->no_hw) {
+ if (!intel->no_hw) {
if (drmCommandWrite (intel->driFd, DRM_I830_BATCHBUFFER, &batch,
sizeof(batch))) {
fprintf(stderr, "DRM_I830_BATCHBUFFER: %d\n", -errno);
@@ -190,7 +188,7 @@ intel_exec_ioctl(struct intel_context *intel,
execbuf.ops_list = (unsigned)start; // TODO
execbuf.fence_arg.flags = DRM_FENCE_FLAG_SHAREABLE | DRM_I915_FENCE_FLAG_FLUSHED;
- if (intel->intelScreen->no_hw)
+ if (intel->no_hw)
return;
if (drmCommandWriteRead(intel->driFd, DRM_I915_EXECBUFFER, &execbuf,
@@ -201,7 +199,7 @@ intel_exec_ioctl(struct intel_context *intel,
}
- fo = intel_ttm_fence_create_from_arg(intel->intelScreen->bufmgr, "fence buffers",
+ fo = intel_ttm_fence_create_from_arg(intel->bufmgr, "fence buffers",
&execbuf.fence_arg);
if (!fo) {
fprintf(stderr, "failed to fence handle: %08x\n", execbuf.fence_arg.handle);
diff --git a/src/mesa/drivers/dri/i965/intel_ioctl.h b/src/mesa/drivers/dri/i965/intel_ioctl.h
index af74ed436ec..8674aef723d 100644
--- a/src/mesa/drivers/dri/i965/intel_ioctl.h
+++ b/src/mesa/drivers/dri/i965/intel_ioctl.h
@@ -30,8 +30,8 @@
#include "intel_context.h"
-void intelWaitIrq( intelScreenPrivate *intelScreen, int seq );
-int intelEmitIrqLocked( intelScreenPrivate *intelScreen );
+void intelWaitIrq( struct intel_context *intel, int seq );
+int intelEmitIrqLocked( struct intel_context *intel );
void intel_batch_ioctl( struct intel_context *intel,
GLuint start_offset,
diff --git a/src/mesa/drivers/dri/i965/intel_regions.c b/src/mesa/drivers/dri/i965/intel_regions.c
index 64610e551ed..feaecbc754c 100644
--- a/src/mesa/drivers/dri/i965/intel_regions.c
+++ b/src/mesa/drivers/dri/i965/intel_regions.c
@@ -86,7 +86,7 @@ struct intel_region *intel_region_alloc( struct intel_context *intel,
region->height = height; /* needed? */
region->refcount = 1;
- region->buffer = dri_bo_alloc(intel->intelScreen->bufmgr, "region",
+ region->buffer = dri_bo_alloc(intel->bufmgr, "region",
pitch * cpp * height, 64, DRM_BO_FLAG_MEM_TT);
return region;
@@ -116,79 +116,6 @@ void intel_region_release( struct intel_context *intel,
*region = NULL;
}
-
-struct intel_region *intel_region_create_static(intelScreenPrivate *intelScreen,
- char *name,
- GLuint mem_type,
- unsigned int bo_handle,
- GLuint offset,
- void *virtual,
- GLuint cpp, GLuint pitch,
- GLuint height, GLboolean tiled)
-{
- struct intel_region *region = calloc(sizeof(*region), 1);
-
- DBG("%s\n", __FUNCTION__);
-
- region->cpp = cpp;
- region->pitch = pitch;
- region->height = height; /* needed? */
- region->refcount = 1;
- region->tiled = tiled;
-
- if (intelScreen->ttm) {
- assert(bo_handle != -1);
- region->buffer = intel_ttm_bo_create_from_handle(intelScreen->bufmgr,
- name,
- bo_handle);
- } else {
- region->buffer = dri_bo_alloc_static(intelScreen->bufmgr,
- name,
- offset, pitch * cpp * height,
- virtual,
- DRM_BO_FLAG_MEM_TT);
- }
-
- return region;
-}
-
-void
-intel_region_update_static(intelScreenPrivate *intelScreen,
- struct intel_region *region,
- GLuint mem_type,
- unsigned int bo_handle,
- GLuint offset,
- void *virtual,
- GLuint cpp, GLuint pitch, GLuint height,
- GLboolean tiled)
-{
- DBG("%s\n", __FUNCTION__);
-
- region->cpp = cpp;
- region->pitch = pitch;
- region->height = height; /* needed? */
- region->tiled = tiled;
-
- /*
- * We use a "shared" buffer type to indicate buffers created and
- * shared by others.
- */
-
- dri_bo_unreference(region->buffer);
- if (intelScreen->ttm) {
- assert(bo_handle != -1);
- region->buffer = intel_ttm_bo_create_from_handle(intelScreen->bufmgr,
- "static region",
- bo_handle);
- } else {
- region->buffer = dri_bo_alloc_static(intelScreen->bufmgr,
- "static region",
- offset, pitch * cpp * height,
- virtual,
- DRM_BO_FLAG_MEM_TT);
- }
-}
-
void _mesa_copy_rect( GLubyte *dst,
GLuint cpp,
GLuint dst_pitch,
@@ -300,3 +227,79 @@ void intel_region_fill( struct intel_context *intel,
color );
}
+static struct intel_region *
+intel_recreate_static(struct intel_context *intel,
+ const char *name,
+ struct intel_region *region,
+ intelRegion *region_desc,
+ GLuint mem_type)
+{
+ intelScreenPrivate *intelScreen = intel->intelScreen;
+
+ if (region == NULL) {
+ region = calloc(sizeof(*region), 1);
+ region->refcount = 1;
+ }
+
+ region->cpp = intelScreen->cpp;
+ region->pitch = region_desc->pitch / intelScreen->cpp;
+ region->height = intelScreen->height; /* needed? */
+ region->tiled = region_desc->tiled;
+
+ if (intel->ttm) {
+ assert(region_desc->bo_handle != -1);
+ region->buffer = intel_ttm_bo_create_from_handle(intel->bufmgr,
+ name,
+ region_desc->bo_handle);
+ } else {
+ region->buffer = dri_bo_alloc_static(intel->bufmgr,
+ name,
+ region_desc->offset,
+ region_desc->pitch *
+ intelScreen->height,
+ region_desc->map,
+ DRM_BO_FLAG_MEM_TT);
+ }
+
+ assert(region->buffer != NULL);
+
+ return region;
+}
+
+/**
+ * Create intel_region structs to describe the static front, back, and depth
+ * buffers created by the xserver.
+ *
+ * Although FBO's mean we now no longer use these as render targets in
+ * all circumstances, they won't go away until the back and depth
+ * buffers become private, and the front buffer will remain even then.
+ *
+ * Note that these don't allocate video memory, just describe
+ * allocations alread made by the X server.
+ */
+void
+intel_recreate_static_regions(struct intel_context *intel)
+{
+ intelScreenPrivate *intelScreen = intel->intelScreen;
+
+ intel->front_region =
+ intel_recreate_static(intel, "front",
+ intel->front_region,
+ &intelScreen->front,
+ DRM_BO_FLAG_MEM_TT);
+
+ intel->back_region =
+ intel_recreate_static(intel, "back",
+ intel->back_region,
+ &intelScreen->back,
+ DRM_BO_FLAG_MEM_TT);
+
+ /* Still assumes front.cpp == depth.cpp. We can kill this when we move to
+ * private buffers.
+ */
+ intel->depth_region =
+ intel_recreate_static(intel, "depth",
+ intel->depth_region,
+ &intelScreen->depth,
+ DRM_BO_FLAG_MEM_TT);
+}
diff --git a/src/mesa/drivers/dri/i965/intel_regions.h b/src/mesa/drivers/dri/i965/intel_regions.h
index 985102cc182..3e130203c3c 100644
--- a/src/mesa/drivers/dri/i965/intel_regions.h
+++ b/src/mesa/drivers/dri/i965/intel_regions.h
@@ -67,6 +67,8 @@ void intel_region_reference( struct intel_region **dst,
void intel_region_release(struct intel_context *intel,
struct intel_region **ib );
+void intel_recreate_static_regions(struct intel_context *intel);
+
/* Static regions may be tiled. The assumption is that the X server
* has set up fence registers to define tiled zones in agp and these
* buffers are within those zones. Tiling regions without fence
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index 975c647e55e..61d2b9a7b24 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -129,108 +129,6 @@ intelMapScreenRegions(__DRIscreenPrivate *sPriv)
return GL_TRUE;
}
-/** Driver-specific fence emit implementation for the fake memory manager. */
-static unsigned int
-intel_fence_emit(void *private)
-{
- intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
- unsigned int fence;
-
- /* XXX: Need to emit a flush, if we haven't already (at least with the
- * current batchbuffer implementation, we have).
- */
-
- fence = intelEmitIrqLocked(intelScreen);
-
- return fence;
-}
-
-/** Driver-specific fence wait implementation for the fake memory manager. */
-static int
-intel_fence_wait(void *private, unsigned int cookie)
-{
- intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
-
- intelWaitIrq(intelScreen, cookie);
-
- return 0;
-}
-
-static struct intel_region *
-intel_recreate_static(intelScreenPrivate *intelScreen,
- char *name, struct intel_region *region,
- intelRegion *region_desc,
- GLuint mem_type)
-{
- if (region) {
- intel_region_update_static(intelScreen, region, mem_type,
- region_desc->bo_handle, region_desc->offset,
- region_desc->map, intelScreen->cpp,
- region_desc->pitch / intelScreen->cpp,
- intelScreen->height, region_desc->tiled);
- } else {
- region = intel_region_create_static(intelScreen, name, mem_type,
- region_desc->bo_handle,
- region_desc->offset,
- region_desc->map, intelScreen->cpp,
- region_desc->pitch / intelScreen->cpp,
- intelScreen->height,
- region_desc->tiled);
- }
-
- assert(region->buffer != NULL);
-
- return region;
-}
-
-
-/* Create intel_region structs to describe the static front,back,depth
- * buffers created by the xserver.
- *
- * Although FBO's mean we now no longer use these as render targets in
- * all circumstances, they won't go away until the back and depth
- * buffers become private, and the front and rotated buffers will
- * remain even then.
- *
- * Note that these don't allocate video memory, just describe
- * allocations alread made by the X server.
- */
-static void
-intel_recreate_static_regions(intelScreenPrivate *intelScreen)
-{
- intelScreen->front_region =
- intel_recreate_static(intelScreen, "front",
- intelScreen->front_region,
- &intelScreen->front,
- DRM_BO_FLAG_MEM_TT);
-
- /* The rotated region is only used for old DDXes that didn't handle rotation
- * on their own.
- */
- if (intelScreen->driScrnPriv->ddx_version.minor < 8) {
- intelScreen->rotated_region =
- intel_recreate_static(intelScreen, "rotated",
- intelScreen->rotated_region,
- &intelScreen->rotated,
- DRM_BO_FLAG_MEM_TT);
- }
-
- intelScreen->back_region =
- intel_recreate_static(intelScreen, "back",
- intelScreen->back_region,
- &intelScreen->back,
- DRM_BO_FLAG_MEM_TT);
-
- /* Still assumes front.cpp == depth.cpp. We can kill this when we move to
- * private buffers.
- */
- intelScreen->depth_region =
- intel_recreate_static(intelScreen, "depth",
- intelScreen->depth_region,
- &intelScreen->depth,
- DRM_BO_FLAG_MEM_TT);
-}
-
void
intelUnmapScreenRegions(intelScreenPrivate *intelScreen)
{
@@ -415,7 +313,6 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
(((GLubyte *)sPriv->pSAREA)+intelScreen->sarea_priv_offset);
intelScreen->deviceID = gDRIPriv->deviceID;
- intelScreen->maxBatchSize = 16 * 1024;
intelScreen->mem = gDRIPriv->mem;
intelScreen->cpp = gDRIPriv->cpp;
@@ -473,39 +370,6 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
sPriv->extensions = intelExtensions;
- if (getenv("INTEL_NO_TTM") == NULL &&
- intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
- intelScreen->drmMinor >= 11 &&
- intelScreen->front.bo_handle != -1) {
- intelScreen->bufmgr = intel_bufmgr_ttm_init(sPriv->fd,
- DRM_FENCE_TYPE_EXE,
- DRM_FENCE_TYPE_EXE |
- DRM_I915_FENCE_TYPE_RW,
- intelScreen->maxBatchSize);
- if (intelScreen->bufmgr != NULL)
- intelScreen->ttm = GL_TRUE;
- }
- /* Otherwise, use the classic buffer manager. */
- if (intelScreen->bufmgr == NULL) {
- if (intelScreen->tex.size == 0) {
- fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
- __func__, __LINE__);
- return GL_FALSE;
- }
- fprintf(stderr, "[%s:%u] Failed to init TTM buffer manager, falling back"
- " to classic.\n", __func__, __LINE__);
- intelScreen->bufmgr = dri_bufmgr_fake_init(intelScreen->tex.offset,
- intelScreen->tex.map,
- intelScreen->tex.size,
- intel_fence_emit,
- intel_fence_wait,
- intelScreen);
- }
-
- intel_recreate_static_regions(intelScreen);
-
- intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
-
return GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/i965/intel_screen.h b/src/mesa/drivers/dri/i965/intel_screen.h
index 9d6c9dedbfe..fb8f6a366c1 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.h
+++ b/src/mesa/drivers/dri/i965/intel_screen.h
@@ -55,11 +55,6 @@ typedef struct
intelRegion depth;
intelRegion tex;
- struct intel_region *front_region;
- struct intel_region *back_region;
- struct intel_region *depth_region;
- struct intel_region *rotated_region;
-
int deviceID;
int width;
int height;
@@ -83,23 +78,10 @@ typedef struct
int current_rotation; /* 0, 90, 180 or 270 */
int rotatedWidth, rotatedHeight;
- GLboolean no_hw;
-
/**
* Configuration cache with default values for all contexts
*/
driOptionCache optionCache;
-
- dri_bufmgr *bufmgr;
- unsigned int maxBatchSize;
-
- /**
- * This value indicates that the kernel memory manager is being used
- * instead of the fake client-side memory manager.
- */
- GLboolean ttm;
-
- unsigned batch_id;
} intelScreenPrivate;