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authorKenneth Graunke <[email protected]>2011-02-22 13:30:34 -0800
committerKenneth Graunke <[email protected]>2011-05-17 23:32:59 -0700
commit706dbf85f15d42c320481dabe2a3db0c2cbbebb8 (patch)
treed9b971bad19869ac03446317c5db4c8e23ca40a4 /src/mesa/drivers/dri/i965
parente0e2c045965f7bd4becae3dce8394f8455184e0d (diff)
i965: Upload binding table pointers on Ivybridge.
Ivybridge uses per-stage commands to update binding table pointers. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen7_vs_state.c6
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_state.c6
4 files changed, 16 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 3e35e54d35a..7f2b34611b5 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -832,6 +832,10 @@
# define GEN6_BINDING_TABLE_MODIFY_GS (1 << 9)
# define GEN6_BINDING_TABLE_MODIFY_PS (1 << 12)
+#define _3DSTATE_BINDING_TABLE_POINTERS_VS 0x7826 /* GEN7+ */
+#define _3DSTATE_BINDING_TABLE_POINTERS_GS 0x7829 /* GEN7+ */
+#define _3DSTATE_BINDING_TABLE_POINTERS_PS 0x782A /* GEN7+ */
+
#define _3DSTATE_SAMPLER_STATE_POINTERS 0x7802 /* GEN6+ */
# define PS_SAMPLER_STATE_CHANGE (1 << 12)
# define GS_SAMPLER_STATE_CHANGE (1 << 9)
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 6684cdc278b..25b2803b0cc 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -220,8 +220,6 @@ const struct brw_tracked_state *gen7_atoms[] =
&gen6_scissor_state,
- &gen6_binding_table_pointers,
-
&brw_depthbuffer,
&brw_polygon_stipple,
diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
index 5697e90a8b8..6a7add8e562 100644
--- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
@@ -35,6 +35,11 @@ upload_vs_state(struct brw_context *brw)
struct intel_context *intel = &brw->intel;
struct gl_context *ctx = &intel->ctx;
+ BEGIN_BATCH(2);
+ OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_VS << 16 | (2 - 2));
+ OUT_BATCH(brw->vs.bind_bo_offset);
+ ADVANCE_BATCH();
+
if (brw->vs.push_const_size == 0) {
/* Disable the push constant buffers. */
BEGIN_BATCH(7);
@@ -86,6 +91,7 @@ const struct brw_tracked_state gen7_vs_state = {
BRW_NEW_URB_FENCE |
BRW_NEW_CONTEXT |
BRW_NEW_VERTEX_PROGRAM |
+ BRW_NEW_VS_BINDING_TABLE |
BRW_NEW_BATCH),
.cache = CACHE_NEW_VS_PROG
},
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 9d5a71fda4e..bae7f477a88 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -155,6 +155,11 @@ upload_ps_state(struct brw_context *brw)
struct intel_context *intel = &brw->intel;
uint32_t dw2, dw4, dw5;
+ BEGIN_BATCH(2);
+ OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_PS << 16 | (2 - 2));
+ OUT_BATCH(brw->wm.bind_bo_offset);
+ ADVANCE_BATCH();
+
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->nr_params == 0) {
/* Disable the push constant buffers. */
@@ -234,6 +239,7 @@ const struct brw_tracked_state gen7_ps_state = {
.brw = (BRW_NEW_CURBE_OFFSETS |
BRW_NEW_FRAGMENT_PROGRAM |
BRW_NEW_NR_WM_SURFACES |
+ BRW_NEW_PS_BINDING_TABLE |
BRW_NEW_URB_FENCE |
BRW_NEW_BATCH),
.cache = (CACHE_NEW_SAMPLER |