mesa: replace _mesa_index_buffer::type with index_size

This avoids repeated translations of the enum.

Reviewed-by: Ilia Mirkin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>

6 files changed, 17 insertions, 28 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 7b354c4f7ea..c7d6e49dd67 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -885,7 +885,7 @@ struct brw_context
       /* Updates are signaled by BRW_NEW_INDEX_BUFFER. */
       struct brw_bo *bo;
       uint32_t size;
-      GLuint type;
+      unsigned index_size;
 
       /* Offset to index buffer index to use in CMD_3D_PRIM so that we can
        * avoid re-uploading the IB packet over and over if we're actually
@@ -1401,23 +1401,12 @@ unsigned brw_get_vertex_surface_type(struct brw_context *brw,
                                      const struct gl_vertex_array *glarray);
 
 static inline unsigned
-brw_get_index_type(GLenum type)
+brw_get_index_type(unsigned index_size)
 {
-   assert((type == GL_UNSIGNED_BYTE)
-          || (type == GL_UNSIGNED_SHORT)
-          || (type == GL_UNSIGNED_INT));
-
-   /* The possible values for type are GL_UNSIGNED_BYTE (0x1401),
-    * GL_UNSIGNED_SHORT (0x1403), and GL_UNSIGNED_INT (0x1405) which we want
-    * to map to scale factors of 0, 1, and 2, respectively.  These scale
-    * factors are then left-shfited by 8 to be in the correct position in the
-    * CMD_INDEX_BUFFER packet.
-    *
-    * Subtracting 0x1401 gives 0, 2, and 4.  Shifting left by 7 afterwards
-    * gives 0x00000000, 0x00000100, and 0x00000200.  These just happen to be
-    * the values the need to be written in the CMD_INDEX_BUFFER packet.
+   /* The hw needs 0x00000000, 0x00000100, and 0x00000200 for ubyte, ushort,
+    * and uint, respectively.
     */
-   return (type - 0x1401) << 7;
+   return (index_size >> 1) << 8;
 }
 
 void brw_prepare_vertices(struct brw_context *brw);
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 14b60a9abc2..7846293cb1b 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -1174,7 +1174,7 @@ brw_upload_indices(struct brw_context *brw)
    if (index_buffer == NULL)
       return;
 
-   ib_type_size = _mesa_sizeof_type(index_buffer->type);
+   ib_type_size = index_buffer->index_size;
    ib_size = index_buffer->count ? ib_type_size * index_buffer->count :
                                    index_buffer->obj->Size;
    bufferobj = index_buffer->obj;
@@ -1231,8 +1231,8 @@ brw_upload_indices(struct brw_context *brw)
    if (brw->ib.bo != old_bo)
       brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER;
 
-   if (index_buffer->type != brw->ib.type) {
-      brw->ib.type = index_buffer->type;
+   if (index_buffer->index_size != brw->ib.index_size) {
+      brw->ib.index_size = index_buffer->index_size;
       brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER;
    }
 }
@@ -1264,7 +1264,7 @@ brw_emit_index_buffer(struct brw_context *brw)
    BEGIN_BATCH(3);
    OUT_BATCH(CMD_INDEX_BUFFER << 16 |
              cut_index_setting |
-             brw_get_index_type(index_buffer->type) |
+             brw_get_index_type(index_buffer->index_size) |
              1);
    OUT_RELOC(brw->ib.bo,
              I915_GEM_DOMAIN_VERTEX, 0,
diff --git a/src/mesa/drivers/dri/i965/brw_primitive_restart.c b/src/mesa/drivers/dri/i965/brw_primitive_restart.c
index e329cc73b7a..8e5a58af404 100644
--- a/src/mesa/drivers/dri/i965/brw_primitive_restart.c
+++ b/src/mesa/drivers/dri/i965/brw_primitive_restart.c
@@ -52,14 +52,14 @@ can_cut_index_handle_restart_index(struct gl_context *ctx,
 
    bool cut_index_will_work;
 
-   switch (ib->type) {
-   case GL_UNSIGNED_BYTE:
+   switch (ib->index_size) {
+   case 1:
       cut_index_will_work = ctx->Array.RestartIndex == 0xff;
       break;
-   case GL_UNSIGNED_SHORT:
+   case 2:
       cut_index_will_work = ctx->Array.RestartIndex == 0xffff;
       break;
-   case GL_UNSIGNED_INT:
+   case 4:
       cut_index_will_work = ctx->Array.RestartIndex == 0xffffffff;
       break;
    default:
@@ -193,7 +193,7 @@ haswell_upload_cut_index(struct brw_context *brw)
    /* BRW_NEW_INDEX_BUFFER */
    unsigned cut_index;
    if (brw->ib.ib) {
-      cut_index = _mesa_primitive_restart_index(ctx, brw->ib.type);
+      cut_index = _mesa_primitive_restart_index(ctx, brw->ib.index_size);
    } else {
       /* There's no index buffer, but primitive restart may still apply
        * to glDrawArrays and such.  FIXED_INDEX mode only applies to drawing
diff --git a/src/mesa/drivers/dri/i965/gen8_draw_upload.c b/src/mesa/drivers/dri/i965/gen8_draw_upload.c
index 32e144741a0..e81cca96749 100644
--- a/src/mesa/drivers/dri/i965/gen8_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/gen8_draw_upload.c
@@ -375,7 +375,7 @@ gen8_emit_index_buffer(struct brw_context *brw)
 
    BEGIN_BATCH(5);
    OUT_BATCH(CMD_INDEX_BUFFER << 16 | (5 - 2));
-   OUT_BATCH(brw_get_index_type(index_buffer->type) | mocs_wb);
+   OUT_BATCH(brw_get_index_type(index_buffer->index_size) | mocs_wb);
    OUT_RELOC64(brw->ib.bo, I915_GEM_DOMAIN_VERTEX, 0, 0);
    OUT_BATCH(brw->ib.size);
    ADVANCE_BATCH();
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index 3931b8ceee0..7157420328f 100644
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -264,7 +264,7 @@ retry:
     */
    brw->ctx.NewDriverState |= BRW_NEW_BLORP;
    brw->no_depth_or_stencil = false;
-   brw->ib.type = -1;
+   brw->ib.index_size = -1;
 
    if (params->dst.enabled)
       brw_render_cache_set_add_bo(brw, params->dst.addr.buffer);
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 6e4b55cf9ec..154c095aa9f 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -389,7 +389,7 @@ brw_new_batch(struct brw_context *brw)
 
    brw->ctx.NewDriverState |= BRW_NEW_BATCH;
 
-   brw->ib.type = -1;
+   brw->ib.index_size = -1;
 
    /* We need to periodically reap the shader time results, because rollover
     * happens every few seconds.  We also want to see results every once in a