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authorEric Anholt <[email protected]>2009-11-03 13:41:22 -0800
committerEric Anholt <[email protected]>2010-02-25 10:53:06 -0800
commit0b9932ffde3f7228288717302b43aa01df0b5fa0 (patch)
tree2e51ffdbf9a00b6719283ca3515d5963da18ddf7 /src/mesa/drivers/dri/i965
parent719f2b1d8570aa58b970bd28941221ee6c34af9b (diff)
i965: Update WM surface state setup for sandybridge's new BLEND_STATE.
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c39
2 files changed, 24 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 4c12e68c0e2..afa940962f9 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -124,9 +124,11 @@ const struct brw_tracked_state *gen6_atoms[] =
&brw_cc_vp,
&brw_cc_unit,
+#endif
&brw_vs_surfaces, /* must do before unit */
&brw_wm_constant_surface, /* must do before wm surfaces/bind bo */
&brw_wm_surfaces, /* must do before samplers and unit */
+#if 0
&brw_wm_samplers,
&brw_wm_unit,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 1db438ae7b5..a42067611ce 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -509,7 +509,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
struct gl_renderbuffer *rb,
unsigned int unit)
{
- struct intel_context *intel = &brw->intel;;
+ struct intel_context *intel = &brw->intel;
GLcontext *ctx = &intel->ctx;
dri_bo *region_bo = NULL;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
@@ -576,18 +576,21 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
key.draw_x = 0;
key.draw_y = 0;
}
- /* _NEW_COLOR */
- memcpy(key.color_mask, ctx->Color.ColorMask[unit],
- sizeof(key.color_mask));
- /* As mentioned above, disable writes to the alpha component when the
- * renderbuffer is XRGB.
- */
- if (ctx->DrawBuffer->Visual.alphaBits == 0)
- key.color_mask[3] = GL_FALSE;
+ if (intel->gen < 6) {
+ /* _NEW_COLOR */
+ memcpy(key.color_mask, ctx->Color.ColorMask[unit],
+ sizeof(key.color_mask));
+
+ /* As mentioned above, disable writes to the alpha component when the
+ * renderbuffer is XRGB.
+ */
+ if (ctx->DrawBuffer->Visual.alphaBits == 0)
+ key.color_mask[3] = GL_FALSE;
- key.color_blend = (!ctx->Color._LogicOpEnabled &&
- (ctx->Color.BlendEnabled & (1 << unit)));
+ key.color_blend = (!ctx->Color._LogicOpEnabled &&
+ (ctx->Color.BlendEnabled & (1 << unit)));
+ }
dri_bo_unreference(brw->wm.surf_bo[unit]);
brw->wm.surf_bo[unit] = brw_search_cache(&brw->surface_cache,
@@ -639,12 +642,14 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
brw_set_surface_tiling(&surf, key.tiling);
surf.ss3.pitch = (key.pitch * key.cpp) - 1;
- /* _NEW_COLOR */
- surf.ss0.color_blend = key.color_blend;
- surf.ss0.writedisable_red = !key.color_mask[0];
- surf.ss0.writedisable_green = !key.color_mask[1];
- surf.ss0.writedisable_blue = !key.color_mask[2];
- surf.ss0.writedisable_alpha = !key.color_mask[3];
+ if (intel->gen < 6) {
+ /* _NEW_COLOR */
+ surf.ss0.color_blend = key.color_blend;
+ surf.ss0.writedisable_red = !key.color_mask[0];
+ surf.ss0.writedisable_green = !key.color_mask[1];
+ surf.ss0.writedisable_blue = !key.color_mask[2];
+ surf.ss0.writedisable_alpha = !key.color_mask[3];
+ }
/* Key size will never match key size for textures, so we're safe. */
brw->wm.surf_bo[unit] = brw_upload_cache(&brw->surface_cache,