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authorAnuj Phogat <[email protected]>2015-04-14 22:06:47 -0700
committerAnuj Phogat <[email protected]>2015-06-08 13:57:11 -0700
commit2cbe730ac53a8510d0decde20a42f1acd51a93a9 (patch)
treeaf9c4db4218ff0fa5f71c912a7737fd3482ba054 /src/mesa/drivers/dri/i965/intel_mipmap_tree.h
parent4f2f5c8d81673473dce8bee3d66b524b4908a823 (diff)
i965: Choose tiling in brw_miptree_layout() function
This refactoring is required by later patches in this series. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_mipmap_tree.h')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.h14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 8b42e4adb79..1d51546abac 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -753,7 +753,11 @@ brw_miptree_get_vertical_slice_pitch(const struct brw_context *brw,
const struct intel_mipmap_tree *mt,
unsigned level);
-void brw_miptree_layout(struct brw_context *brw, struct intel_mipmap_tree *mt);
+void
+brw_miptree_layout(struct brw_context *brw,
+ bool for_bo,
+ enum intel_miptree_tiling_mode requested,
+ struct intel_mipmap_tree *mt);
void *intel_miptree_map_raw(struct brw_context *brw,
struct intel_mipmap_tree *mt);
@@ -780,6 +784,14 @@ intel_miptree_unmap(struct brw_context *brw,
unsigned int level,
unsigned int slice);
+uint32_t
+intel_miptree_choose_tiling(struct brw_context *brw,
+ mesa_format format,
+ uint32_t width0,
+ uint32_t num_samples,
+ enum intel_miptree_tiling_mode requested,
+ struct intel_mipmap_tree *mt);
+
void
intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
unsigned int level, unsigned int layer, enum gen6_hiz_op op);