diff options
| author | Jordan Justen <[email protected]> | 2014-05-28 09:05:37 -0700 |
|---|---|---|
| committer | Jordan Justen <[email protected]> | 2014-08-15 20:11:41 -0700 |
| commit | 27f5fa7a3777332b2e60ccf10dc636ad84a3c478 (patch) | |
| tree | b916d200e7d2a53222bbddcee32b4d64720ca694 /src/mesa/drivers/dri/i965/intel_mipmap_tree.h | |
| parent | 7e856d0b180d3fc0c25f94156ded4a539f456030 (diff) | |
i965: Allow forcing miptree->array_layout = ALL_SLICES_AT_EACH_LOD
gen6 does not support multiple miplevels with separate
stencil/hiz. Therefore we need to layout its miptree with no mipmap
spacing between the slices of each miplevel.
v3:
* Use new array_layout enum
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Topi Pohjolainen <[email protected]>
Acked-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_mipmap_tree.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index bc6411f1eac..f0f6814a599 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -503,7 +503,8 @@ struct intel_mipmap_tree *intel_miptree_create(struct brw_context *brw, GLuint depth0, bool expect_accelerated_upload, GLuint num_samples, - enum intel_miptree_tiling_mode); + enum intel_miptree_tiling_mode, + bool force_all_slices_at_each_lod); struct intel_mipmap_tree * intel_miptree_create_layout(struct brw_context *brw, @@ -515,7 +516,8 @@ intel_miptree_create_layout(struct brw_context *brw, GLuint height0, GLuint depth0, bool for_bo, - GLuint num_samples); + GLuint num_samples, + bool force_all_slices_at_each_lod); struct intel_mipmap_tree * intel_miptree_create_for_bo(struct brw_context *brw, |