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authorJason Ekstrand <[email protected]>2018-01-22 23:33:53 -0800
committerJason Ekstrand <[email protected]>2018-01-24 19:05:36 -0800
commitdfe02179055b2504303e23988ab3d446b40de05a (patch)
treed5dd7ea63a1215b9229810cdd314d89e46007864 /src/mesa/drivers/dri/i965/intel_mipmap_tree.c
parent7d4007d58ab7c0c1796e116b55814f8be4e699a9 (diff)
i965/miptree: Take an aux_usage in prepare/finish_render
Both callers of intel_miptree_prepare/finish_render have to call intel_miptree_render_aux_usage anyway for other reasons. They may as well pass the result in instead of us calling it again. Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_mipmap_tree.c')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index e129d5eb9fb..38287c4528c 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2724,11 +2724,8 @@ void
intel_miptree_prepare_render(struct brw_context *brw,
struct intel_mipmap_tree *mt, uint32_t level,
uint32_t start_layer, uint32_t layer_count,
- enum isl_format render_format,
- bool blend_enabled)
+ enum isl_aux_usage aux_usage)
{
- enum isl_aux_usage aux_usage =
- intel_miptree_render_aux_usage(brw, mt, render_format, blend_enabled);
intel_miptree_prepare_access(brw, mt, level, 1, start_layer, layer_count,
aux_usage, aux_usage != ISL_AUX_USAGE_NONE);
}
@@ -2737,13 +2734,10 @@ void
intel_miptree_finish_render(struct brw_context *brw,
struct intel_mipmap_tree *mt, uint32_t level,
uint32_t start_layer, uint32_t layer_count,
- enum isl_format render_format,
- bool blend_enabled)
+ enum isl_aux_usage aux_usage)
{
assert(_mesa_is_format_color_format(mt->format));
- enum isl_aux_usage aux_usage =
- intel_miptree_render_aux_usage(brw, mt, render_format, blend_enabled);
intel_miptree_finish_write(brw, mt, level, start_layer, layer_count,
aux_usage);
}