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authorKenneth Graunke <[email protected]>2013-07-06 00:36:46 -0700
committerKenneth Graunke <[email protected]>2013-07-09 14:09:34 -0700
commit53631be4ebaa4fb13a7f129727c1cdd32fcc6f3d (patch)
treeddad922e67aee2521ea03acb27bcf38085d836c8 /src/mesa/drivers/dri/i965/intel_fbo.c
parent2e26afb37b83effe44b218d5b2a305020b8ad22f (diff)
i965: Move intel_context::gen and gt fields to brw_context.
Most functions no longer use intel_context, so this patch additionally removes the local "intel" variables to avoid compiler warnings. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_fbo.c')
-rw-r--r--src/mesa/drivers/dri/i965/intel_fbo.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index 02eca0aaf13..0a89492fc69 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -550,7 +550,6 @@ static void
intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
{
struct brw_context *brw = brw_context(ctx);
- struct intel_context *intel = intel_context(ctx);
struct intel_renderbuffer *depthRb =
intel_get_renderbuffer(fb, BUFFER_DEPTH);
struct intel_renderbuffer *stencilRb =
@@ -596,7 +595,7 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
"instead of S8\n",
_mesa_get_format_name(stencil_mt->format));
}
- if (intel->gen < 7 && !intel_renderbuffer_has_hiz(depthRb)) {
+ if (brw->gen < 7 && !intel_renderbuffer_has_hiz(depthRb)) {
/* Before Gen7, separate depth and stencil buffers can be used
* only if HiZ is enabled. From the Sandybridge PRM, Volume 2,
* Part 1, Bit 3DSTATE_DEPTH_BUFFER.SeparateStencilBufferEnable: