diff options
| author | Eric Anholt <[email protected]> | 2013-09-17 16:47:30 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2013-09-30 14:35:42 -0700 |
| commit | 7de88ac38004e68b5a0a94c881cc1da1ee4371d7 (patch) | |
| tree | 67dbb1e6751c994eebcf41b5f07e19f94f93dec3 /src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | |
| parent | 9c116d5eacf286cd8548d64ba8ce6528edb889c9 (diff) | |
i965: Totally switch around how we handle nonzero baselevel-first_level.
This has no effect currently, because intel_finalize_mipmap_tree() always
makes mt->first_level == tObj->BaseLevel.
The change I made before to handle it
(b1080cfbdb0a084122fcd662cd27b4748c5598fd) got very close to working, but
after fixing some unrelated bugs in the series, it still left
tex-miplevel-selection producing errors when testing textureLod(). The
problem is that for explicit LODs, the sampler's LOD clamping is ignored,
and only the surface's MIP clamping is respected. So we need to use
surface mip clamping, which applies on top of the sampler's mip clamping,
so the sampler change gets backed out.
Now actually tested with a non-regressing series producing a non-zero
computed baselevel.
Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_wm_surface_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index f0d87ebd453..89c0055e16c 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -348,8 +348,10 @@ gen7_update_texture_surface(struct gl_context *ctx, surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout); surf[5] = (SET_FIELD(GEN7_MOCS_L3, GEN7_SURFACE_MOCS) | + SET_FIELD(tObj->BaseLevel - mt->first_level, + GEN7_SURFACE_MIN_LOD) | /* mip count */ - (intelObj->_MaxLevel - mt->first_level)); + (intelObj->_MaxLevel - tObj->BaseLevel)); if (brw->is_haswell) { /* Handling GL_ALPHA as a surface format override breaks 1.30+ style |