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authorKenneth Graunke <[email protected]>2013-07-06 00:15:44 -0700
committerKenneth Graunke <[email protected]>2013-07-09 14:09:31 -0700
commit794de2f3873bcedc78300b3ba69656adc755894c (patch)
tree381191e3ebf1742f8519177f26a4507231dfcec3 /src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
parent44fd490067692f0f9c1b5cff86e2e24a915af0c1 (diff)
i965: Move intel_context::is_<platform> flags to brw_context.
Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_wm_surface_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_surface_state.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index ee1fe4ba3e7..e1690a79827 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -347,7 +347,7 @@ gen7_update_texture_surface(struct gl_context *ctx,
/* mip count */
(intelObj->_MaxLevel - tObj->BaseLevel));
- if (intel->is_haswell) {
+ if (brw->is_haswell) {
/* Handling GL_ALPHA as a surface format override breaks 1.30+ style
* texturing functions that return a float, as our code generation always
* selects the .x channel (which would always be 0).
@@ -410,7 +410,7 @@ gen7_create_constant_surface(struct brw_context *brw,
surf[3] = SET_FIELD((w >> 21) & 0x3f, BRW_SURFACE_DEPTH) |
(stride - 1);
- if (intel->is_haswell) {
+ if (brw->is_haswell) {
surf[7] = SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) |
SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) |
SET_FIELD(HSW_SCS_BLUE, GEN7_SURFACE_SCS_B) |
@@ -612,7 +612,7 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
surf[7] = irb->mt->fast_clear_color_value;
- if (intel->is_haswell) {
+ if (brw->is_haswell) {
surf[7] |= (SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) |
SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) |
SET_FIELD(HSW_SCS_BLUE, GEN7_SURFACE_SCS_B) |