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authorChris Wilson <[email protected]>2015-04-30 17:04:51 +0100
committerKenneth Graunke <[email protected]>2015-06-24 10:35:04 -0700
commit4b35ab9bdb4e663f41ff5c9ae5bbcc650b6093f9 (patch)
tree623f9d02e44c1601d8abf09fa89e7fd06186aa83 /src/mesa/drivers/dri/i965/gen7_sol_state.c
parent9d4b9f1e0c661e5ed8ce2e71c76ce8cc1adf90dd (diff)
i965: Rename intel_emit* to reflect their new location in brw_pipe_control
Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_sol_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_sol_state.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c
index aec4f44bb73..41573a80a52 100644
--- a/src/mesa/drivers/dri/i965/gen7_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c
@@ -365,7 +365,7 @@ gen7_save_primitives_written_counters(struct brw_context *brw,
}
/* Flush any drawing so that the counters have the right values. */
- intel_batchbuffer_emit_mi_flush(brw);
+ brw_emit_mi_flush(brw);
/* Emit MI_STORE_REGISTER_MEM commands to write the values. */
for (int i = 0; i < streams; i++) {
@@ -502,7 +502,7 @@ gen7_pause_transform_feedback(struct gl_context *ctx,
(struct brw_transform_feedback_object *) obj;
/* Flush any drawing so that the counters have the right values. */
- intel_batchbuffer_emit_mi_flush(brw);
+ brw_emit_mi_flush(brw);
/* Save the SOL buffer offset register values. */
if (brw->gen < 8) {