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authorKenneth Graunke <[email protected]>2011-11-01 10:54:08 -0700
committerKenneth Graunke <[email protected]>2011-11-10 22:51:19 -0800
commit6ba9090ea05e817bd38c1fcc63c53168b16593c7 (patch)
treefefb9ecff7cd5ef9227228fae00bb664fc86acdc /src/mesa/drivers/dri/i965/gen7_cc_state.c
parent0983c6869bead0c31c62e5b1dda7f70898d43971 (diff)
i965: Use 0 for the number of binding table entries in 3DSTATE_(VS|WM).
These fields control how many entries the hardware prefetches into the state cache, so they only impact performance, not correctness. However, it's not clear how to use this in a way that's beneficial. According to the documentation, kernels "using a large number" of entries may wish to program this to zero to avoid thrashing the cache; it's unclear how many is too many. Also, Ironlake's WM was missing this feature entirely---the count had to be zero. The dirty bit tracking to handle this complicates the surface state and binding table setup; removing it should simplify things and make future refactoring easier. So just set 0 for the number of entries rather than trying to compute and track it. Appears to have no impact on Nexuiz and OpenArena on Sandybridge. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Paul Berry <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_cc_state.c')
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