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authorPaul Berry <[email protected]>2013-05-07 14:04:29 -0700
committerPaul Berry <[email protected]>2013-06-12 10:45:42 -0700
commit7e5cb4bc4c8dfc96019b815e2c9a62af12e1f958 (patch)
treee19056fa80ed2927368939232d3d1d5f45b02e4c /src/mesa/drivers/dri/i965/gen7_blorp.cpp
parent8f5147c199748ae129c527322823c2b40fb36941 (diff)
i965/gen7+: Create an enum for keeping track of fast color clear state.
This patch includes code to update the fast color clear state appropriately when rendering occurs. The state will also need to be updated when a fast clear or a resolve operation is performed; those state updates will be added when the fast clear and resolve operations are added. v2: Create a new function, intel_miptree_used_for_rendering() to handle updating the fast color clear state when rendering occurs. Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_blorp.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_blorp.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index aa9a3ef3759..68c7ca11626 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -862,6 +862,7 @@ gen7_blorp_exec(struct intel_context *intel,
uint32_t wm_surf_offset_renderbuffer;
uint32_t wm_surf_offset_texture = 0;
wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params);
+ intel_miptree_used_for_rendering(params->dst.mt);
wm_surf_offset_renderbuffer =
gen7_blorp_emit_surface_state(brw, params, &params->dst,
I915_GEM_DOMAIN_RENDER,