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authorKenneth Graunke <[email protected]>2017-01-05 02:51:38 -0800
committerKenneth Graunke <[email protected]>2017-01-13 11:57:06 -0800
commit99c019e1d41eb72c5ca9e0ae4b263acd6e6c214f (patch)
treebb7a3c820e23f2eae89233a8143d53e6da54d6f8 /src/mesa/drivers/dri/i965/brw_wm_surface_state.c
parent6d2fb04f0922047232d10b2a5d292d68c9506f45 (diff)
i965: Fix textureGather with RG32I/UI on Gen7.
According to the "Gather4 R32G32_FLOAT Bug" internal documentation page, the R32G32_UINT and R32G32_SINT formats are affected by the same bug as R32G32_FLOAT. Applying the same workarounds should be viable - apparently the R32G32_FLOAT_LD format shouldn't corrupt integer data which is NaN or other sketchy floating point values. One irritating caveat is that, because it's a FLOAT format, the alpha channel or any set to SCS_ONE return 0x3f8 (1.0) rather than integer 1. So we need shader code to whack those channels to 1. Fixes GL45-CTS.texture_gather.plain-gather-int-cube-rg on Haswell. v2: Fix swizzle component zeroing (caught by Jordan Justen). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_surface_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 4566696fa98..02aea78e726 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -565,7 +565,9 @@ brw_update_texture_surface(struct gl_context *ctx,
/* Implement gen6 and gen7 gather work-around */
bool need_green_to_blue = false;
if (for_gather) {
- if (brw->gen == 7 && format == BRW_SURFACEFORMAT_R32G32_FLOAT) {
+ if (brw->gen == 7 && (format == BRW_SURFACEFORMAT_R32G32_FLOAT ||
+ format == BRW_SURFACEFORMAT_R32G32_SINT ||
+ format == BRW_SURFACEFORMAT_R32G32_UINT)) {
format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
need_green_to_blue = brw->is_haswell;
} else if (brw->gen == 6) {