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authorPaul Berry <[email protected]>2012-07-04 05:48:25 -0700
committerPaul Berry <[email protected]>2012-07-11 15:14:49 -0700
commit1bd4d456cdecf7bea55f4e3dac574af54efad994 (patch)
tree240f42776eb6e453443539c153e3e84c318fc9b8 /src/mesa/drivers/dri/i965/brw_wm_surface_state.c
parent67b0f7c7dddeb92ee4d24ed3977e20b70f5674f6 (diff)
i965/msaa: Add an enum to describe MSAA layout.
From the Ivy Bridge PRM, Vol 1 Part 1, p112: There are three types of multisampled surface layouts designated as follows: - IMS Interleaved Multisampled Surface - CMS Compressed Mulitsampled Surface - UMS Uncompressed Multisampled Surface Previously, the i965 driver only used IMS and UMS formats, and distinguished beetween them using the boolean intel_mipmap_tree::msaa_is_interleaved. To facilitate adding support for the CMS format, this patch replaces that boolean (and other booleans derived from it) with an enum INTEL_MSAA_LAYOUT_{IMS,CMS,UMS}. It also updates the terminology used in comments throughout the driver to match the IMS/CMS/UMS terminology used in the PRM. CMS layout is not yet used. The enum has a fourth possible value, INTEL_MSAA_LAYOUT_NONE, which is used for non-multisampled surfaces. Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_surface_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 04ae6b23289..ddf38e3dd35 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1022,7 +1022,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
width, height, depth,
true,
0 /* num_samples */,
- false /* msaa_is_interleaved */);
+ INTEL_MSAA_LAYOUT_NONE);
intel_miptree_copy_teximage(intel, intel_image, new_mt);
intel_miptree_reference(&irb->mt, intel_image->mt);