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authorXiang, Haihao <[email protected]>2008-07-08 14:14:04 +0800
committerXiang, Haihao <[email protected]>2008-07-08 14:14:04 +0800
commit92c075eeb7c330ea420400d1c2bae57356b19f03 (patch)
treed6a441c63834fbbe29361dbfde372263004f5216 /src/mesa/drivers/dri/i965/brw_vs_emit.c
parenta36bf890e8be3473f6a98f5ba4369e3acc0463ad (diff)
i965: official name for GM45 chipset
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vs_emit.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_emit.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 3cac97c71f4..7767d1369ce 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -867,7 +867,7 @@ static void emit_vertex_write( struct brw_vs_compile *c)
* Later, clipping will detect ucp[6] and ensure the primitive is
* clipped against all fixed planes.
*/
- if (!BRW_IS_IGD(p->brw) && !c->key.know_w_is_one) {
+ if (!(BRW_IS_GM45(p->brw) || BRW_IS_G4X(p->brw)) && !c->key.know_w_is_one) {
brw_CMP(p,
vec8(brw_null_reg()),
BRW_CONDITIONAL_L,