diff options
author | Kenneth Graunke <[email protected]> | 2014-12-03 14:26:48 -0800 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2014-12-04 17:50:52 -0800 |
commit | ae45a5a28d8c8a48e7353e37da2ce28a6f2bdef4 (patch) | |
tree | 81ceb657d99bc330ba4cb5d50fb8ac54ac221dee /src/mesa/drivers/dri/i965/brw_vs.c | |
parent | 0b4a6886915571540cfa26fec6fd460d3b81216f (diff) |
i965: Compute VS attribute WA bits earlier and check if they changed.
BRW_NEW_VERTICES is flagged every time we draw a primitive. Having
the brw_vs_prog atom depend on BRW_NEW_VERTICES meant that we had to
compute the VS program key and do a program cache lookup for every
single primitive. This is painfully expensive.
The workaround bit computation is almost entirely based on the vertex
attribute arrays (brw->vb.inputs[i]), which are set by brw_merge_inputs.
The only thing it uses the VS program for is to see which VS inputs are
actually read. brw_merge_inputs() happens once per primitive, and can
safely look at the currently bound vertex program, as it doesn't change
in the middle of a draw.
This patch moves the workaround bit computation to brw_merge_inputs(),
right after assigning brw->vb.inputs[i], and stores the previous WA bit
values in the context. If they've actually changed from the last draw
(which is uncommon), we signal that we need a new vertex program,
causing brw_vs_prog to compute a new key.
Improves performance in Gl32Batch7 by 13.6123% +/- 0.739652% (n=166)
on Haswell GT3e. I'm told Baytrail shows similar gains.
v2: Introduce a new BRW_NEW_VS_ATTRIB_WORKAROUNDS dirty bit, rather
than reusing BRW_NEW_VERTEX_PROGRAM (suggested by Chris Forbes).
This prevents unnecessary re-emission of surface/sampler related
atoms (and an SOL atom on Sandybridge).
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Chris Forbes <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vs.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vs.c | 41 |
1 files changed, 4 insertions, 37 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 970d86cc698..cc2af35ab50 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -453,42 +453,9 @@ static void brw_upload_vs_prog(struct brw_context *brw) brw_populate_sampler_prog_key_data(ctx, prog, brw->vs.base.sampler_count, &key.base.tex); - /* BRW_NEW_VERTICES */ - if (brw->gen < 8 && !brw->is_haswell) { - /* Prior to Haswell, the hardware can't natively support GL_FIXED or - * 2_10_10_10_REV vertex formats. Set appropriate workaround flags. - */ - for (i = 0; i < VERT_ATTRIB_MAX; i++) { - if (!(vp->program.Base.InputsRead & BITFIELD64_BIT(i))) - continue; - - uint8_t wa_flags = 0; - - switch (brw->vb.inputs[i].glarray->Type) { - - case GL_FIXED: - wa_flags = brw->vb.inputs[i].glarray->Size; - break; - - case GL_INT_2_10_10_10_REV: - wa_flags |= BRW_ATTRIB_WA_SIGN; - /* fallthough */ - - case GL_UNSIGNED_INT_2_10_10_10_REV: - if (brw->vb.inputs[i].glarray->Format == GL_BGRA) - wa_flags |= BRW_ATTRIB_WA_BGRA; - - if (brw->vb.inputs[i].glarray->Normalized) - wa_flags |= BRW_ATTRIB_WA_NORMALIZE; - else if (!brw->vb.inputs[i].glarray->Integer) - wa_flags |= BRW_ATTRIB_WA_SCALE; - - break; - } - - key.gl_attrib_wa_flags[i] = wa_flags; - } - } + /* BRW_NEW_VS_ATTRIB_WORKAROUNDS */ + memcpy(key.gl_attrib_wa_flags, brw->vb.attrib_wa_flags, + sizeof(brw->vb.attrib_wa_flags)); if (!brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG, &key, sizeof(key), @@ -526,7 +493,7 @@ const struct brw_tracked_state brw_vs_prog = { _NEW_TEXTURE | _NEW_TRANSFORM, .brw = BRW_NEW_VERTEX_PROGRAM | - BRW_NEW_VERTICES, + BRW_NEW_VS_ATTRIB_WORKAROUNDS, }, .emit = brw_upload_vs_prog }; |