aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
diff options
context:
space:
mode:
authorNeil Roberts <[email protected]>2015-04-15 14:28:26 +0100
committerNeil Roberts <[email protected]>2015-04-16 13:01:43 +0100
commita9e4cf5d323dbf11e42deda389ed03db571a7df7 (patch)
tree784ae764fef9353af50511828050d0cee21b7121 /src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
parent037e0e78abf0c312f737d33f3c33e37b22bf226d (diff)
i965/vec4: Add a helper function to emit VS_OPCODE_PULL_CONSTANT_LOAD
There were three places in the visitor that had a similar chunk of code to emit the VS_OPCODE_PULL_CONSTANT_LOAD opcode using a register for the offset. This patch combines the chunks into a helper function to reduce the code duplication. It will also be useful in the next patch to expand what happens on Gen9+. This shouldn't introduce any functional changes. Reviewed-by: Ben Widawsky <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_vp.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_vp.cpp27
1 files changed, 5 insertions, 22 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
index c3b0233eba2..8756bef79ab 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
@@ -528,14 +528,6 @@ vec4_vs_visitor::get_vp_src_reg(const prog_src_register &src)
/* Add the small constant index to the address register */
src_reg reladdr = src_reg(this, glsl_type::int_type);
- /* We have to use a message header on Skylake to get SIMD4x2 mode.
- * Reserve space for the register.
- */
- if (brw->gen >= 9) {
- reladdr.reg_offset++;
- alloc.sizes[reladdr.reg] = 2;
- }
-
dst_reg dst_reladdr = dst_reg(reladdr);
dst_reladdr.writemask = WRITEMASK_X;
emit(ADD(dst_reladdr, this->vp_addr_reg, src_reg(src.Index)));
@@ -553,20 +545,11 @@ vec4_vs_visitor::get_vp_src_reg(const prog_src_register &src)
result = src_reg(this, glsl_type::vec4_type);
src_reg surf_index = src_reg(unsigned(prog_data->base.binding_table.pull_constants_start));
- vec4_instruction *load;
- if (brw->gen >= 7) {
- load = new(mem_ctx)
- vec4_instruction(VS_OPCODE_PULL_CONSTANT_LOAD_GEN7,
- dst_reg(result), surf_index, reladdr);
- load->mlen = 1;
- } else {
- load = new(mem_ctx)
- vec4_instruction(VS_OPCODE_PULL_CONSTANT_LOAD,
- dst_reg(result), surf_index, reladdr);
- load->base_mrf = 14;
- load->mlen = 1;
- }
- emit(load);
+
+ emit_pull_constant_load_reg(dst_reg(result),
+ surf_index,
+ reladdr,
+ NULL, NULL /* before_block/inst */);
break;
}