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authorIago Toral Quiroga <[email protected]>2014-07-09 08:46:17 +0200
committerIago Toral Quiroga <[email protected]>2014-09-19 15:01:15 +0200
commitd0bdd4ce983ddd52f9f4b70dced4e471c60a130c (patch)
tree9aad892da19828554291c6e99aa1f906be4d10ed /src/mesa/drivers/dri/i965/brw_vec4.h
parent406e04113fb23c514cc63bdab9a46476261d6f10 (diff)
i965/gen6/gs: Implement GS_OPCODE_FF_SYNC.
This implements the FF_SYNC message required in gen6 geometry shaders to get the initial URB handle. Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 186667c62e5..d2d2a8f5fac 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -656,6 +656,9 @@ private:
void generate_gs_prepare_channel_masks(struct brw_reg dst);
void generate_gs_set_channel_masks(struct brw_reg dst, struct brw_reg src);
void generate_gs_get_instance_id(struct brw_reg dst);
+ void generate_gs_ff_sync(vec4_instruction *inst,
+ struct brw_reg dst,
+ struct brw_reg src0);
void generate_oword_dual_block_offsets(struct brw_reg m1,
struct brw_reg index);
void generate_scratch_write(vec4_instruction *inst,