i965/vs: Replace brw_vs_emit.c with dumping code into the vec4_visitor.

Rather than having two separate backends, just create a small layer that
translates the subset of Mesa IR used for ARB_vertex_program and fixed
function programs to the Vec4 IR.  This allows us to use the same
optimization passes, code generator, register allocator as for GLSL.

v2: Incorporate Eric's review comments.
- Fix use of uninitialized src_swiz[] values in the SWIZZLE_ZERO/ONE
  case: just initialize it to 0 (.x) since the value doesn't matter
  (those channels get writemasked out anyway).
- Properly reswizzle source register's swizzles, rather than overwriting
  the swizzle.
- Port the old brw_vs_emit code for computing .x of the EXP2 opcode.
- Update comments, removing mention of NV_vertex_program, etc.
- Delete remaining #warning lines and debug comments.

Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>

1 files changed, 14 insertions, 2 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index e4dcbc43309..1029e6d3ce4 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -188,7 +188,7 @@ public:
    /** @{
     * Annotation for the generated IR.  One of the two can be set.
     */
-   ir_instruction *ir;
+   const void *ir;
    const char *annotation;
 
    bool is_tex();
@@ -223,7 +223,7 @@ public:
     * GLSL IR currently being processed, which is associated with our
     * driver IR instructions for debugging purposes.
     */
-   ir_instruction *base_ir;
+   const void *base_ir;
    const char *current_annotation;
 
    int *virtual_grf_sizes;
@@ -235,6 +235,9 @@ public:
    int *virtual_grf_use;
    dst_reg userplane[MAX_CLIP_PLANES];
 
+   src_reg *vp_temp_regs;
+   src_reg vp_addr_reg;
+
    /**
     * This is the size to be used for an array with an element per
     * reg_offset
@@ -249,6 +252,8 @@ public:
 
    void reladdr_to_temp(ir_instruction *ir, src_reg *reg, int *num_reladdr);
 
+   bool need_all_constants_in_pull_buffer;
+
    src_reg src_reg_for_float(float val);
 
    /**
@@ -369,6 +374,13 @@ public:
    /** Walks an exec_list of ir_instruction and sends it through this visitor. */
    void visit_instructions(const exec_list *list);
 
+   void setup_vp_regs();
+   void emit_vertex_program_code();
+   void emit_vp_sop(uint32_t condmod, dst_reg dst,
+                    src_reg src0, src_reg src1, src_reg one);
+   dst_reg get_vp_dst_reg(const prog_dst_register &dst);
+   src_reg get_vp_src_reg(const prog_src_register &src);
+
    void emit_bool_to_cond_code(ir_rvalue *ir, uint32_t *predicate);
    void emit_bool_comparison(unsigned int op, dst_reg dst, src_reg src0, src_reg src1);
    void emit_if_gen6(ir_if *ir);