diff options
author | Paul Berry <[email protected]> | 2013-07-13 07:09:54 -0700 |
---|---|---|
committer | Paul Berry <[email protected]> | 2013-08-23 11:02:47 -0700 |
commit | 626495d269e2c2df9dae5c46c086ffff93c77a19 (patch) | |
tree | 46530432672a636fd52e5fd7bfbe98793e045da8 /src/mesa/drivers/dri/i965/brw_vec4.cpp | |
parent | 72168f5f0069b2a0d8a2434ba80f4446952e84c7 (diff) |
i965/vec4: Allow for dispatch_grf_start_reg to vary.
Both 3DSTATE_VS and 3DSTATE_GS have a dispatch_grf_start_reg control,
which determines the register where the hardware delivers data sourced
from the URB (push constants followed by per-vertex input data).
For vertex shaders, we always set dispatch_grf_start_reg to 1, since
R1 is always the first register available for push constants in vertex
shaders.
For geometry shaders, we'll need the flexibility to set
dispatch_grf_start_reg to different values depending on the behvaiour
of the geometry shader; if it accesses gl_PrimitiveIDIn, we'll need to
set it to 2 to allow the primitive ID to be delivered to the thread in
R1.
This patch eliminates the assumption that dispatch_grf_start_reg is
always 1. In vec4_visitor, we record the regnum that was passed to
vec4_visitor::setup_uniforms() in prog_data for later use. In
vec4_generator, we consult this value when converting an abstract
UNIFORM register to a concrete hardware register. And in the code
that emits 3DSTATE_VS, we set dispatch_grf_start_reg based on the
value recorded in prog_data.
This will allow us to set dispatch_grf_start_reg to the appropriate
value when compiling geometry shaders. Vertex shaders will continue
to always use a dispatch_grf_start_reg of 1.
v2: Make dispatch_grf_start_reg "unsigned" rather than "GLuint".
Reviewed-by: Ian Romanick <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 36527cd7972..bfef8e0829b 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -1260,6 +1260,8 @@ vec4_vs_visitor::setup_attributes(int payload_reg) int vec4_visitor::setup_uniforms(int reg) { + prog_data->dispatch_grf_start_reg = reg; + /* The pre-gen6 VS requires that some push constants get loaded no * matter what, or the GPU would hang. */ @@ -1280,7 +1282,7 @@ vec4_visitor::setup_uniforms(int reg) prog_data->nr_params = this->uniforms * 4; - prog_data->curb_read_length = reg - 1; + prog_data->curb_read_length = reg - prog_data->dispatch_grf_start_reg; return reg; } |