diff options
| author | Kenneth Graunke <[email protected]> | 2013-07-06 00:36:46 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2013-07-09 14:09:34 -0700 |
| commit | 53631be4ebaa4fb13a7f129727c1cdd32fcc6f3d (patch) | |
| tree | ddad922e67aee2521ea03acb27bcf38085d836c8 /src/mesa/drivers/dri/i965/brw_surface_formats.c | |
| parent | 2e26afb37b83effe44b218d5b2a305020b8ad22f (diff) | |
i965: Move intel_context::gen and gt fields to brw_context.
Most functions no longer use intel_context, so this patch additionally
removes the local "intel" variables to avoid compiler warnings.
Signed-off-by: Kenneth Graunke <[email protected]>
Acked-by: Chris Forbes <[email protected]>
Acked-by: Paul Berry <[email protected]>
Acked-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_surface_formats.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_surface_formats.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index f4feed4dc0b..2f23296d4bd 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -527,12 +527,11 @@ brw_format_for_mesa_format(gl_format mesa_format) void brw_init_surface_formats(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->intel.ctx; int gen; gl_format format; - gen = intel->gen * 10; + gen = brw->gen * 10; if (brw->is_g4x) gen += 5; @@ -652,7 +651,6 @@ bool brw_render_target_supported(struct brw_context *brw, struct gl_renderbuffer *rb) { - struct intel_context *intel = &brw->intel; gl_format format = rb->Format; /* Many integer formats are promoted to RGBA (like XRGB8888 is), which means @@ -671,7 +669,7 @@ brw_render_target_supported(struct brw_context *brw, */ if (rb->NumSamples > 0 && _mesa_get_format_bytes(format) > 8) { /* Gen6: MSAA on >64 bit formats is unsupported. */ - if (intel->gen <= 6) + if (brw->gen <= 6) return false; /* Gen7: 8x MSAA on >64 bit formats is unsupported. */ @@ -688,7 +686,6 @@ translate_tex_format(struct brw_context *brw, GLenum depth_mode, GLenum srgb_decode) { - struct intel_context *intel = &brw->intel; struct gl_context *ctx = &brw->intel.ctx; if (srgb_decode == GL_SKIP_DECODE_EXT) mesa_format = _mesa_get_srgb_format_linear(mesa_format); @@ -715,7 +712,7 @@ translate_tex_format(struct brw_context *brw, return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; case MESA_FORMAT_SRGB_DXT1: - if (intel->gen == 4 && !brw->is_g4x) { + if (brw->gen == 4 && !brw->is_g4x) { /* Work around missing SRGB DXT1 support on original gen4 by just * skipping SRGB decode. It's not worth not supporting sRGB in * general to prevent this. |