aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/brw_state_upload.c
diff options
context:
space:
mode:
authorKenneth Graunke <[email protected]>2014-10-22 08:58:58 -0700
committerKenneth Graunke <[email protected]>2014-11-04 11:38:01 -0800
commit7423cc891b4d6fcc63bfeb79cc1d711ce81122bd (patch)
treed303842e3932b852d6b4351f685545fa5b928ca9 /src/mesa/drivers/dri/i965/brw_state_upload.c
parent8ccf54ab098032da4652b314761c04f7724a7277 (diff)
i965: Implement the PMA stall fix.
Certain non-promoted depth cases typically incur stalls. In very specific cases, we can enable a workaround which improves performance. Improves performance in GLBenchmark 2.7 TRex by 1.17762% +/- 0.448765% (n=75) at 1280x720 on Broadwell GT3. Haswell has this feature as well, but we can't currently write registers from userspace batches (and we'd incur additional software batch scanning overhead as well), so we haven't enabled it. Broadwell allows us to write CACHE_MODE_1. Backporters beware: the formula and flushing incantation differs between Haswell and Broadwell. v2: Move pma_stall_bits from brw->state to brw itself (requested by Kristian Høgsberg). Signed-off-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_state_upload.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index a6913195848..1c53e5b7d7d 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -333,6 +333,7 @@ static const struct brw_tracked_state *gen8_atoms[] =
&gen8_vertices,
&haswell_cut_index,
+ &gen8_pma_fix,
};
static void
@@ -390,6 +391,11 @@ void brw_init_state( struct brw_context *brw )
brw->state.dirty.mesa = ~0;
brw->state.dirty.brw = ~0ull;
+ /* ~0 is a nonsensical value which won't match anything we program, so
+ * the programming will take effect on the first time around.
+ */
+ brw->pma_stall_bits = ~0;
+
/* Make sure that brw->state.dirty.brw has enough bits to hold all possible
* dirty flags.
*/