diff options
| author | Ben Widawsky <[email protected]> | 2015-05-15 21:25:36 -0700 |
|---|---|---|
| committer | Ben Widawsky <[email protected]> | 2015-05-18 12:02:18 -0700 |
| commit | c14bb072301f68b68dcc9fff3e49210cb0819912 (patch) | |
| tree | 3043989bf8163848d36892790ef875b38761a0ef /src/mesa/drivers/dri/i965/brw_state.h | |
| parent | 313abbb8ca1f41b28c58571ca8217332d52283c7 (diff) | |
i965: Add Gen9 surface state decoding
Gen9 surface state is very similar to the previous generation. The important
changes here are aux mode, and the way clear colors work.
NOTE: There are some things intentionally left out of this decoding.
v2: Redo the string for the aux buffer type to address compressed variants.
v3: Use the shift for compression enable (instead of compression mode) (Topi)
Signed-off-by: Ben Widawsky <[email protected]>
Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_state.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state.h | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index bc79fb6d882..987672f8815 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -229,11 +229,14 @@ void brw_destroy_caches( struct brw_context *brw ); #define BRW_BATCH_STRUCT(brw, s) \ intel_batchbuffer_data(brw, (s), sizeof(*(s)), RENDER_RING) -void *brw_state_batch(struct brw_context *brw, - enum aub_state_struct_type type, - int size, - int alignment, - uint32_t *out_offset); +void *__brw_state_batch(struct brw_context *brw, + enum aub_state_struct_type type, + int size, + int alignment, + int index, + uint32_t *out_offset); +#define brw_state_batch(brw, type, size, alignment, out_offset) \ + __brw_state_batch(brw, type, size, alignment, 0, out_offset) /* brw_wm_surface_state.c */ void gen4_init_vtable_surface_functions(struct brw_context *brw); |