i965/ps/gen7: Refactor state uploading

Now the uploading depends only on the input parameters instead
of consulting the current gl-state.

v2: Rebased on top of sampler count clamping

Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Signed-off-by: Topi Pohjolainen <[email protected]>

1 files changed, 9 insertions, 0 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index ab067c3f1f8..f8d56b9848e 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -245,6 +245,15 @@ void brw_update_renderbuffer_surfaces(struct brw_context *brw,
                                       uint32_t render_target_start,
                                       uint32_t *surf_offset);
 
+/* gen7_wm_state.c */
+void
+gen7_upload_ps_state(struct brw_context *brw,
+                     const struct gl_fragment_program *fp,
+                     const struct brw_stage_state *stage_state,
+                     const struct brw_wm_prog_data *prog_data,
+                     bool enable_dual_src_blend, unsigned sample_mask,
+                     unsigned fast_clear_op);
+
 /* gen7_wm_surface_state.c */
 uint32_t gen7_surface_tiling_mode(uint32_t tiling);
 uint32_t gen7_surface_msaa_bits(unsigned num_samples, enum intel_msaa_layout l);