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authorKenneth Graunke <[email protected]>2015-05-06 00:04:10 -0700
committerKenneth Graunke <[email protected]>2015-10-21 14:27:41 -0700
commitbea75227829512ab0e4766e00ac1b509c7586667 (patch)
treeac8d23dd58729b2ba0dc1fc1ce187cdf04e945da /src/mesa/drivers/dri/i965/brw_inst.h
parent0e57694745979286cda0cd414cc6d1f4efe5408b (diff)
i965: Introduce new SHADER_OPCODE_URB_WRITE_SIMD8_MASKED/PER_SLOT opcodes.
In the vec4 backend, we have a vec4_instruction::urb_write_flags field. There are many kinds of flags for SIMD4x2 messages. However, there are really only two (per-slot offset, use channel masks) for SIMD8 messages. Rather than adding a boolean flag for per-slot offsets (polluting all instructions), I decided to just make three new opcodes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_inst.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_inst.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_inst.h b/src/mesa/drivers/dri/i965/brw_inst.h
index db05a8a5f30..4ed95c473cd 100644
--- a/src/mesa/drivers/dri/i965/brw_inst.h
+++ b/src/mesa/drivers/dri/i965/brw_inst.h
@@ -393,6 +393,7 @@ FF(urb_per_slot_offset,
/* 4-6: */ -1, -1, -1, -1, -1, -1, -1, -1,
/* 7: */ MD(16), MD(16),
/* 8: */ MD(17), MD(17))
+FC(urb_channel_mask_present, MD(15), MD(15), devinfo->gen >= 8)
FC(urb_complete, MD(15), MD(15), devinfo->gen < 8)
FC(urb_used, MD(14), MD(14), devinfo->gen < 7)
FC(urb_allocate, MD(13), MD(13), devinfo->gen < 7)