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authorKenneth Graunke <[email protected]>2014-11-24 23:30:51 -0800
committerKenneth Graunke <[email protected]>2014-12-02 17:00:26 -0800
commitce44b2061cf59264b4f22271e8d70cdc826af6de (patch)
tree9dade4ef4bede55eab23459281b0652e42ae4328 /src/mesa/drivers/dri/i965/brw_gs_surface_state.c
parent2a4f5728ad27bd1605b3604908caa9ad4983e256 (diff)
i965: Rename CACHE_NEW_*_PROG to BRW_NEW_*_PROG_DATA.
Now that we've moved a bunch of CACHE_NEW_* bits to BRW_NEW_*, the only ones that are left are legitimately related to the program cache. Yet, it seems a bit wasteful to have an entire bitfield for only 7 bits. State upload is one of the hottest paths in the driver. For each atom in the list, we call check_state() to see if it needs to be emitted. Currently, this involves comparing three separate bitfields (mesa, brw, and cache). Consolidating the brw and cache bitfields would save a small amount of CPU overhead per atom. Broadwell, for example, has 57 state atoms, so this small savings can add up. CACHE_NEW_*_PROG covers the brw_*_prog_data structures, as well as the offset into the program cache BO (prog_offset). Since most uses refer to brw_*_prog_data, I decided to use BRW_NEW_*_PROG_DATA as the name. Removing "cache" completely is a bit painful, so I decided to do it in several patches for easier review, and to separate mechanical changes from manual ones. This one simply renames things, and was made via: $ for file in *.[ch]; do sed -i -e 's/CACHE_NEW_\([A-Z_\*]*\)_PROG/BRW_NEW_\1_PROG_DATA/g' \ -e 's/BRW_NEW_WM_PROG_DATA/BRW_NEW_FS_PROG_DATA/g' $file done Note that BRW_NEW_*_PROG_DATA is still in .cache, not .brw! The next patch will remedy this flaw. It will also fix the alphabetization issues. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Acked-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_gs_surface_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs_surface_state.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
index 34505994af7..267880baec1 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
@@ -46,7 +46,7 @@ brw_upload_gs_pull_constants(struct brw_context *brw)
if (!gp)
return;
- /* CACHE_NEW_GS_PROG */
+ /* BRW_NEW_GS_PROG_DATA */
const struct brw_stage_prog_data *prog_data = &brw->gs.prog_data->base.base;
/* _NEW_PROGRAM_CONSTANTS */
@@ -59,7 +59,7 @@ const struct brw_tracked_state brw_gs_pull_constants = {
.mesa = _NEW_PROGRAM_CONSTANTS,
.brw = BRW_NEW_BATCH |
BRW_NEW_GEOMETRY_PROGRAM,
- .cache = CACHE_NEW_GS_PROG,
+ .cache = BRW_NEW_GS_PROG_DATA,
},
.emit = brw_upload_gs_pull_constants,
};
@@ -76,7 +76,7 @@ brw_upload_gs_ubo_surfaces(struct brw_context *brw)
if (!prog)
return;
- /* CACHE_NEW_GS_PROG */
+ /* BRW_NEW_GS_PROG_DATA */
brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_GEOMETRY],
&brw->gs.base, &brw->gs.prog_data->base.base);
}
@@ -86,7 +86,7 @@ const struct brw_tracked_state brw_gs_ubo_surfaces = {
.mesa = _NEW_PROGRAM,
.brw = BRW_NEW_BATCH |
BRW_NEW_UNIFORM_BUFFER,
- .cache = CACHE_NEW_GS_PROG,
+ .cache = BRW_NEW_GS_PROG_DATA,
},
.emit = brw_upload_gs_ubo_surfaces,
};
@@ -100,7 +100,7 @@ brw_upload_gs_abo_surfaces(struct brw_context *brw)
ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY];
if (prog) {
- /* CACHE_NEW_GS_PROG */
+ /* BRW_NEW_GS_PROG_DATA */
brw_upload_abo_surfaces(brw, prog, &brw->gs.base,
&brw->gs.prog_data->base.base);
}
@@ -111,7 +111,7 @@ const struct brw_tracked_state brw_gs_abo_surfaces = {
.mesa = _NEW_PROGRAM,
.brw = BRW_NEW_ATOMIC_BUFFER |
BRW_NEW_BATCH,
- .cache = CACHE_NEW_GS_PROG,
+ .cache = BRW_NEW_GS_PROG_DATA,
},
.emit = brw_upload_gs_abo_surfaces,
};