i965: GS: Use the VUE map to compute URB size.

The previous computation had two bugs: (a) it used a formula based on
Gen5 for Gen6 and Gen7 as well. (b) it failed to account for the fact
that PSIZ is stored in the VUE header.  Fortunately, both bugs caused
it to compute a URB size that was too large, which was benign.  This
patch computes the URB size directly from the VUE map, so it gets the
result correct in all circumstances.

Reviewed-by: Eric Anholt <[email protected]>

1 files changed, 4 insertions, 5 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_gs.h b/src/mesa/drivers/dri/i965/brw_gs.h
index c33528e4577..b369e7db4f6 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.h
+++ b/src/mesa/drivers/dri/i965/brw_gs.h
@@ -44,7 +44,9 @@ struct brw_gs_prog_key {
    GLuint primitive:4;
    GLuint pv_first:1;
    GLuint need_gs_prog:1;
-   GLuint pad:26;
+   GLuint nr_userclip:4;
+   GLuint do_twoside_color:1;
+   GLuint pad:21;
 };
 
 struct brw_gs_compile {
@@ -58,11 +60,8 @@ struct brw_gs_compile {
       struct brw_reg temp;
    } reg;
 
-   /* 3 different ways of expressing vertex size:
-    */
-   GLuint nr_attrs;
+   /* Number of registers used to store vertex data */
    GLuint nr_regs;
-   GLuint nr_bytes;
 };
 
 #define ATTR_SIZE  (4*4)