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authorFrancisco Jerez <[email protected]>2015-04-23 14:28:25 +0300
committerFrancisco Jerez <[email protected]>2015-05-04 15:05:21 +0300
commitf118e5d15fd9b35cf27a975a702c5fb81d3157aa (patch)
tree186f15e6df7a6764bbdbc2826e142f37ec6a8145 /src/mesa/drivers/dri/i965/brw_fs_generator.cpp
parent0775d8835ac8d1f2ab75d04f0cddbad36b6787fe (diff)
i965: Add typed surface access opcodes.
Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs_generator.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_generator.cpp17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 7fe1afa6b32..5b9f95df098 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -2036,6 +2036,23 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
inst->mlen, src[2].dw1.ud);
break;
+ case SHADER_OPCODE_TYPED_ATOMIC:
+ assert(src[2].file == BRW_IMMEDIATE_VALUE);
+ brw_typed_atomic(p, dst, src[0], src[1],
+ src[2].dw1.ud, inst->mlen, !inst->dst.is_null());
+ break;
+
+ case SHADER_OPCODE_TYPED_SURFACE_READ:
+ assert(src[2].file == BRW_IMMEDIATE_VALUE);
+ brw_typed_surface_read(p, dst, src[0], src[1],
+ inst->mlen, src[2].dw1.ud);
+ break;
+
+ case SHADER_OPCODE_TYPED_SURFACE_WRITE:
+ assert(src[2].file == BRW_IMMEDIATE_VALUE);
+ brw_typed_surface_write(p, src[0], src[1], inst->mlen, src[2].dw1.ud);
+ break;
+
case FS_OPCODE_SET_SIMD4X2_OFFSET:
generate_set_simd4x2_offset(inst, dst, src[0]);
break;