diff options
author | Francisco Jerez <[email protected]> | 2015-04-23 14:21:31 +0300 |
---|---|---|
committer | Francisco Jerez <[email protected]> | 2015-05-04 15:05:20 +0300 |
commit | 2f1c16df3e997771bcedb60ae7f16a21c4c60144 (patch) | |
tree | a8aeba71c471b089e7aaabe5704da745d5260980 /src/mesa/drivers/dri/i965/brw_fs_generator.cpp | |
parent | 4348046a2f08d9795a158b96f8579f13f5e693e6 (diff) |
i965: Fix the untyped surface opcodes to deal with indirect surface access.
Change brw_untyped_atomic() and brw_untyped_surface_read() to take the
surface index as a register instead of a constant and to use
brw_send_indirect_message() to emit the indirect variant of send with
a dynamically calculated message descriptor. This will be required to
support variable indexing of image arrays for
ARB_shader_image_load_store.
Acked-by: Kenneth Graunke <[email protected]>
Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs_generator.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index 9ddba3a26dc..e28f4430be8 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -1540,7 +1540,7 @@ fs_generator::generate_untyped_atomic(fs_inst *inst, struct brw_reg dst, surf_index.type == BRW_REGISTER_TYPE_UD); brw_untyped_atomic(p, dst, payload, - atomic_op.dw1.ud, surf_index.dw1.ud, + surf_index, atomic_op.dw1.ud, inst->mlen, true); brw_mark_surface_used(prog_data, surf_index.dw1.ud); @@ -1554,7 +1554,7 @@ fs_generator::generate_untyped_surface_read(fs_inst *inst, struct brw_reg dst, assert(surf_index.file == BRW_IMMEDIATE_VALUE && surf_index.type == BRW_REGISTER_TYPE_UD); - brw_untyped_surface_read(p, dst, payload, surf_index.dw1.ud, inst->mlen, 1); + brw_untyped_surface_read(p, dst, payload, surf_index, inst->mlen, 1); brw_mark_surface_used(prog_data, surf_index.dw1.ud); } |