diff options
author | Eric Anholt <[email protected]> | 2013-02-05 16:21:07 -0800 |
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committer | Eric Anholt <[email protected]> | 2013-02-13 18:10:20 -0800 |
commit | 516d8be502885f5aadcc43aafe764e617f2593f4 (patch) | |
tree | 68d997dacd5c5f4593c809a3f5fbbc1561f4f60e /src/mesa/drivers/dri/i965/brw_fs_emit.cpp | |
parent | bf91f0b03942d966cf453201dc52c4aa4049f8fa (diff) |
i965: Remove writemask support from brw_SAMPLE().
The code was rather broken for non-XYZW on 8-wide, but all of our
callers were using XYZW anyway. For my experiments with using writemask
on texturing, I've been using manual header setup in the compiler
backends, since we want to actually know what registers are written for
optimization and register allocation.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs_emit.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp index 76446523cb1..62e57c98188 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp @@ -491,7 +491,6 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src src, SURF_INDEX_TEXTURE(inst->sampler), inst->sampler, - WRITEMASK_XYZW, msg_type, rlen, inst->mlen, |