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authorJordan Justen <[email protected]>2015-09-24 01:20:55 -0700
committerJordan Justen <[email protected]>2015-09-29 08:23:47 -0700
commitd1be9d21265cf4e344a5d78b17cea7ee2c8408a1 (patch)
tree453c158fe85a2681adf23098c60ffe9755a76822 /src/mesa/drivers/dri/i965/brw_fs.h
parentd57a85f32b2242e19c2d20e91af0218d41e1e9fe (diff)
i965/cs: Add a binding table entry for gl_NumWorkGroups
If glDispatchComputeIndirect is used, then the value for this variable must be read from the indirect BO. To allow the same generated code to support indirect and glDispatchCompute, we will also setup a BO for the number of work groups using the intel_upload_data mechanism. This will only be required if the gl_NumWorkGroups variable is accessed. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 50ce4155f16..a8b6726b9f0 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -128,7 +128,8 @@ public:
bool run_cs();
void optimize();
void allocate_registers();
- void assign_binding_table_offsets();
+ void assign_fs_binding_table_offsets();
+ void assign_cs_binding_table_offsets();
void setup_payload_gen4();
void setup_payload_gen6();
void setup_vs_payload();