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authorFrancisco Jerez <[email protected]>2016-05-27 23:29:14 -0700
committerFrancisco Jerez <[email protected]>2016-05-31 15:57:41 -0700
commitc1107cec44ab030c7fcc97c67baa12df1cc9d7b5 (patch)
treea4a5cd95074d3e50eaffdbc4c1bca8560264702f /src/mesa/drivers/dri/i965/brw_eu_emit.c
parent06d8765bc09ecd8ff73fff424c8cfec645cb0ded (diff)
i965/fs: Allow scalar source regions on SNB math instructions.
I haven't found any evidence that this isn't supported by the hardware, in fact according to the SNB hardware spec: "The supported regioning modes for math instructions are align16, align1 with the following restrictions: - Scalar source is supported. [...] - Source and destination offset must be the same, except the case of scalar source." Cc: "12.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_eu_emit.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu_emit.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 1c2ccb4e163..2538f0dab85 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -2000,8 +2000,10 @@ void gen6_math(struct brw_codegen *p,
assert(dest.hstride == BRW_HORIZONTAL_STRIDE_1);
if (devinfo->gen == 6) {
- assert(src0.hstride == BRW_HORIZONTAL_STRIDE_1);
- assert(src1.hstride == BRW_HORIZONTAL_STRIDE_1);
+ assert(has_scalar_region(src0) ||
+ src0.hstride == BRW_HORIZONTAL_STRIDE_1);
+ assert(has_scalar_region(src1) ||
+ src1.hstride == BRW_HORIZONTAL_STRIDE_1);
}
if (function == BRW_MATH_FUNCTION_INT_DIV_QUOTIENT ||