i965: Set dest type to UW for several send messages

Without this, on SIMD 16 the send instruction destination will appear
to write more than one destination register, causing the simulator to
report an error.

Of course, the send instruction can actually write more than one
destination register regardless of the type set for the destination,
so this is a bit strange.

Suggested-by: Kenneth Graunke <[email protected]>
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>

1 files changed, 4 insertions, 1 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 35d8039ed13..2ef1d7bb825 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -2526,6 +2526,8 @@ brw_send_indirect_message(struct brw_codegen *p,
    struct brw_inst *send;
    int setup;
 
+   dst = retype(dst, BRW_REGISTER_TYPE_UW);
+
    assert(desc.type == BRW_REGISTER_TYPE_UD);
 
    /* We hold on to the setup instruction (the SEND in the direct case, the OR
@@ -3207,6 +3209,7 @@ brw_memory_fence(struct brw_codegen *p,
     * message doesn't write anything back.
     */
    insn = next_insn(p, BRW_OPCODE_SEND);
+   dst = retype(dst, BRW_REGISTER_TYPE_UW);
    brw_set_dest(p, insn, dst);
    brw_set_src0(p, insn, dst);
    brw_set_memory_fence_message(p, insn, GEN7_SFID_DATAPORT_DATA_CACHE,
@@ -3473,7 +3476,7 @@ brw_barrier(struct brw_codegen *p, struct brw_reg src)
    assert(devinfo->gen >= 7);
 
    inst = next_insn(p, BRW_OPCODE_SEND);
-   brw_set_dest(p, inst, brw_null_reg());
+   brw_set_dest(p, inst, retype(brw_null_reg(), BRW_REGISTER_TYPE_UW));
    brw_set_src0(p, inst, src);
    brw_set_src1(p, inst, brw_null_reg());