diff options
| author | Jason Ekstrand <[email protected]> | 2016-09-14 15:09:33 -0700 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2016-09-21 13:45:45 +0300 |
| commit | 8a468d186e6fc27c26dd12ba989192e7596f667a (patch) | |
| tree | f08df7ccc12e4ae2ecb31eea24b3946528216563 /src/mesa/drivers/dri/i965/brw_eu.h | |
| parent | a2392cee48076f1fe6feab7d49214990cfa6a551 (diff) | |
i965/fs: Take Dispatch/Vector mask into account in FIND_LIVE_CHANNEL
On at least Sky Lake, ce0 does not contain the full story as far as enabled
channels goes. It is possible to have completely disabled channels where
the corresponding bits in ce0 are 1. In order to get the correct execution
mask, you have to mask off those channels which were disabled from the
beginning by taking the AND of ce0 with either sr0.2 or sr0.3 depending on
the shader stage. Failure to do so can result in FIND_LIVE_CHANNEL
returning a completely dead channel.
Signed-off-by: Jason Ekstrand <[email protected]>
Cc: Francisco Jerez <[email protected]>
[ Francisco Jerez: Fix a couple of typos, add mask register type
assertion, clarify reason why ce0 can have bits set for disabled
channels, clarify that this may only be a problem when thread
dispatch doesn't pack channels tightly in the SIMD thread. Apply
same treatment to Align16 path. ]
Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_eu.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h index 3e527643704..737a335ab55 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.h +++ b/src/mesa/drivers/dri/i965/brw_eu.h @@ -488,7 +488,8 @@ brw_pixel_interpolator_query(struct brw_codegen *p, void brw_find_live_channel(struct brw_codegen *p, - struct brw_reg dst); + struct brw_reg dst, + struct brw_reg mask); void brw_broadcast(struct brw_codegen *p, |