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authorKenneth Graunke <[email protected]>2011-10-07 22:26:40 -0700
committerKenneth Graunke <[email protected]>2011-10-18 15:57:55 -0700
commit53798f90e818e9bf213c3ae4298751362a5ecd50 (patch)
tree86bd8c91c05c3a0ab27ddf959a2557b34510cf42 /src/mesa/drivers/dri/i965/brw_eu.h
parentfeaff3aeebb2eebfa93ad641e0ed286ab0409d21 (diff)
i965: Rename pixel_scoreboard_clear to last_render_target for clarity.
Finding this bit in the documentation proved challenging. It wasn't in the SEND instruction's message descriptor section, nor the data port message descriptor section. It turns out to be part of the Render Target Write message's control bits, and in the documentation is named "Last Render Target Select". Shaders that use Multiple Render Targets should set this bit on the last RT write, but not on any prior ones. The GPU does update the Pixel Scoreboard appropriately, but doesn't document this bit as directly causing a scoreboard clear. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_eu.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 2f353b90038..33492f6966d 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -881,7 +881,7 @@ void brw_set_dp_write_message(struct brw_compile *p,
GLuint msg_type,
GLuint msg_length,
bool header_present,
- GLuint pixel_scoreboard_clear,
+ GLuint last_render_target,
GLuint response_length,
GLuint end_of_thread,
GLuint send_commit_msg);