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authorEric Anholt <[email protected]>2010-03-22 10:05:42 -0700
committerEric Anholt <[email protected]>2012-02-10 17:08:03 -0800
commit2b28fd6ca603df40a5d02aac4035eced3a1d079a (patch)
treed6aae5bc573e89cbb9c39b3617c9443bfa2031bc /src/mesa/drivers/dri/i965/brw_eu.h
parent46883e01ba90b64f9ddad1aa0b585188081e8290 (diff)
i965: Add support for the MAD opcode on gen6+.
v2: Fix MRF handling on gen7. Reviewed-by: Kenneth Graunke <[email protected]> (v1)
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_eu.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index f6602221e59..dbc84be857f 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -49,6 +49,13 @@
#define BRW_SWIZZLE_WWWW BRW_SWIZZLE4(3,3,3,3)
#define BRW_SWIZZLE_XYXY BRW_SWIZZLE4(0,1,0,1)
+static inline bool brw_is_single_value_swizzle(int swiz)
+{
+ return (swiz == BRW_SWIZZLE_XXXX ||
+ swiz == BRW_SWIZZLE_YYYY ||
+ swiz == BRW_SWIZZLE_ZZZZ ||
+ swiz == BRW_SWIZZLE_WWWW);
+}
#define REG_SIZE (8*4)
@@ -847,10 +854,16 @@ struct brw_instruction *brw_##OP(struct brw_compile *p, \
struct brw_reg src0, \
struct brw_reg src1);
+#define ALU3(OP) \
+struct brw_instruction *brw_##OP(struct brw_compile *p, \
+ struct brw_reg dest, \
+ struct brw_reg src0, \
+ struct brw_reg src1, \
+ struct brw_reg src2);
+
#define ROUND(OP) \
void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0);
-
ALU1(MOV)
ALU2(SEL)
ALU1(NOT)
@@ -876,12 +889,14 @@ ALU2(DP3)
ALU2(DP2)
ALU2(LINE)
ALU2(PLN)
+ALU3(MAD)
ROUND(RNDZ)
ROUND(RNDE)
#undef ALU1
#undef ALU2
+#undef ALU3
#undef ROUND