i965: Remove CACHED_BATCH support altogether.

Using an unoptimized variant of glamor spending 50% of its CPU time in
brw_draw_prims() (and hitting the cache *very* frequently):

    N           Min           Max        Median           Avg        Stddev
x 200         29200         40500         34900         34750     958.43256
+ 200         31000         40300         34700         34622     916.35941
No difference proven at 95.0% confidence

Similarly, no difference on GLB2.7:

    N           Min           Max        Median           Avg        Stddev
x  63          64.1         71.36         70.69     70.113175     1.6782026
+  63          63.6         71.18         70.75     70.223651     1.6044186
No difference proven at 95.0% confidence

v2: Rebase on master (by anholt)
v3: Add a missing BEGIN_BATCH(3) to aa_line_parameters -- CACHED_BATCH
    didn't have the asserts about batchbuffer usage that ADVANCE_BATCH
    does, so we started assertion failing.

Signed-off-by: Kenneth Graunke <[email protected]>
Signed-off-by: Eric Anholt <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>

1 files changed, 2 insertions, 2 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 4959a08898f..5418398afdf 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -643,7 +643,7 @@ static void brw_emit_vertices(struct brw_context *brw)
 		(BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 		(BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 		(BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
-      CACHED_BATCH();
+      ADVANCE_BATCH();
       return;
    }
 
@@ -808,7 +808,7 @@ static void brw_emit_vertices(struct brw_context *brw)
       OUT_BATCH(dw1);
    }
 
-   CACHED_BATCH();
+   ADVANCE_BATCH();
 }
 
 const struct brw_tracked_state brw_vertices = {